FSAE BPSD Design
Posted: Tue Jun 14, 2022 7:38 am
Hey guys, I'm sponsoring a few FSAE teams and I'm thinking about helping them with the BPSD (Brake System Plausibility Device), a device with NO PROGRAMMABLE CIRCUITS that can detect some rules which I will state up next. Since that could be an actual safety product to be sold to more teams with proper documentation.
First off, there's something called a BSE, Brake System Encoder, which is a fancy acronym for a brake pressure or brake pedal position sensor. This must be fed to the control unit that controls throttle (through Analog or CAN, in our case it'll be CAN since the 4chan is already out of analog inputs), but it must also go the BPSD
The rules are as follows:
The BSPD must monitor for the following conditions:
a. Both of the following for more than one second:
• Hard braking (for example >0.8 g deceleration but without locking the wheels)
• Throttle greater than 10% open
b. Loss of signal from the braking sensor(s) for more than 100 msec
c. Loss of signal from the throttle sensor(s) for more than 100 msec
d. Removal of power from the BSPD circuit
IC.4.8.4 When any of the above conditions exist, the BSPD must Open the Shutdown Circuit IC.9.2.2
IC.4.8.5 The BSPD must only be reset by cycling the Primary Master Switch IC.9.3 OFF and ON
A, B, and C are somewhat easy. I already have a basic design which I'm pretty sure will work, using a few comparators (for "hard braking" and TPS), an AND and two OR's, which should take care for A, B and C.
To tackle D, the device needs to boot up the output when it turns on (and all conditions are OK), and power it off when unpowered, which I'm not too sure on how to do (not an electrical engineer here)
IC 4.8.4 is handled by the main output so that's fine
My big conundrum is with IC4.8.5, having the output NOT change when conditions are back to normal, only on power down. I assume that would need a flip flop on the output, but I have basically forgotten everything I ever learned about flip flops lol, so
What do? I have attached a base design which I'm basing myself off (this design is for an Electric FSAE, which can reset on it's own and the timing is different on the shutdowns [500msec instead of 100msec, but that's just recalculating the RC circuit which I already did]), but I have no idea how to latch the output to stay off until power down while ignoring any change in state of the inputs. Halp pls
First off, there's something called a BSE, Brake System Encoder, which is a fancy acronym for a brake pressure or brake pedal position sensor. This must be fed to the control unit that controls throttle (through Analog or CAN, in our case it'll be CAN since the 4chan is already out of analog inputs), but it must also go the BPSD
The rules are as follows:
The BSPD must monitor for the following conditions:
a. Both of the following for more than one second:
• Hard braking (for example >0.8 g deceleration but without locking the wheels)
• Throttle greater than 10% open
b. Loss of signal from the braking sensor(s) for more than 100 msec
c. Loss of signal from the throttle sensor(s) for more than 100 msec
d. Removal of power from the BSPD circuit
IC.4.8.4 When any of the above conditions exist, the BSPD must Open the Shutdown Circuit IC.9.2.2
IC.4.8.5 The BSPD must only be reset by cycling the Primary Master Switch IC.9.3 OFF and ON
A, B, and C are somewhat easy. I already have a basic design which I'm pretty sure will work, using a few comparators (for "hard braking" and TPS), an AND and two OR's, which should take care for A, B and C.
To tackle D, the device needs to boot up the output when it turns on (and all conditions are OK), and power it off when unpowered, which I'm not too sure on how to do (not an electrical engineer here)
IC 4.8.4 is handled by the main output so that's fine
My big conundrum is with IC4.8.5, having the output NOT change when conditions are back to normal, only on power down. I assume that would need a flip flop on the output, but I have basically forgotten everything I ever learned about flip flops lol, so
What do? I have attached a base design which I'm basing myself off (this design is for an Electric FSAE, which can reset on it's own and the timing is different on the shutdowns [500msec instead of 100msec, but that's just recalculating the RC circuit which I already did]), but I have no idea how to latch the output to stay off until power down while ignoring any change in state of the inputs. Halp pls