xtUML: For rusEfi Development?

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klyttle
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xtUML: For rusEfi Development?

Post by klyttle »

Knowing almost nothing about what is involved in embedded system development, I do my usual online research and came across this "thing" called xtUML (http://www.xtuml.org). Though I didn't understand a whole lot about it, I was - to put it mildly - quite fascinated by what I think this concept is about.

I was wondering if the rusEfi developers are aware of xtUML, and if it has any relevance here; it appears so, from what I've been able to ascertain. Or perhaps there is something similar.

Thanks in advance.
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AndreyB
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Re: xtUML: For rusEfi Development?

Post by AndreyB »

I have no idea what it is thus I have no idea if that's applicable :)

UML hints me that this is something about defining the logic of the application in maybe a more human way? The actual logic of rusEfi is probably about 40 lines of code, probably 2% of the total software development investment so far. 98% of the tasks are infrastructure and scheduling stuff relatively coupled with low-latency approach, I am sure any UML thing would have nothing to do with that.
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klyttle
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Re: xtUML: For rusEfi Development?

Post by klyttle »

I'm curious to see what the code would look like in UML (or in its subset xtUML) diagram form just the same.

I'll probably look into this in further detail someday.
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Re: xtUML: For rusEfi Development?

Post by kb1gtt »

Perhaps it would look similar to the Doxygen call graphics like those found here http://rusefi.com/docs/html/struct_m_a_p__sensor__config__s.html
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klyttle
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Re: xtUML: For rusEfi Development?

Post by klyttle »

kb1gtt wrote:Perhaps it would look similar to the Doxygen call graphics like those found here http://rusefi.com/docs/html/struct_m_a_p__sensor__config__s.html
Cool! 8-)

I've been reading further into xtUML's website, and it claims that C/C++, as well as VHDL, can be generated from diagrams created from xtUML (x = executable, t = translatable... makes sense); now that would be outstanding! :P. And speaking of Doxygen, there's Doxygraph (https://code.google.com/p/doxygraph/) which claim to be capable of reverse engineering code to UML... amazing!

This gives me an idea :idea: . Perhaps this should be in a separate thread (and there's a lot of stuff to present here, so please bear with me), but there is another modelling system called Modelica (https://www.modelica.org/) and its derivatives, Open Modelica (https://www.openmodelica.org/), Scicos (http://www.scicos.org/), which in turn, is the basis of Scilab's Xcos (http://www.scilab.org/), which could potentially better model other aspects of rusEfi that UML (or its other derivatives like SysML) are not particularly geared towards.

Then there's also this nifty little system found here: (http://wiki.scilab.org/Xcos/SysML). And the idea(s) behind this, in conjunction with this other, albeit experimental (for now anyway), nifty little system found here: (http://www.open-do.org/projects/p/) could potentially be very useful to synthesize rusEfi onto... you guessed it... an FPGA!. :mrgreen:
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