Frankenso: tpic8101 explosion

[AndreyB]

Was getting a board ready. Hooked +12 volts to the board without W23 (W23 is supposed to connect the power supply to the rest of the board so without W23 the board should have been totally off). Something was unusual:
1) one of the MAX9926 output side LEDs was on - D801 - usually these are off while the board is not connected to anything.
2) USB/TTL "usb connected" D351 was on as well. This one should only be on if a USB cable is connected which it was not.

Once again - that's with just +12volts connected and nothing else, without discovery.

I've checked voltage on W23 and it was 4.9 volts as my multi-meter always show. I guess I should not have ignored the weird LEDs but I did.

So I've added the W23 0R jumper and hooked the board to +12 again. Pop. A piece of TPIC8101 has separated. WAT?

Next step: removing TPIC8101 and trying this board again.

[AndreyB]

Well, removed W23 0R jumper also.

I have continuity from +12 input F1001 to W23 pad 1 - that's unexpected. So D801 LED on is an indication of a fried MAX9926 which got powered by +12 somehow By installing W23 I've connected +12 input to +5 output and this did not go well.

[kb1gtt]

Yikes. I wonder if it could be a problem with the PCB etching. Some times this happens, and could happen on an internal layer. See this picture from a Sparkfun tutorial.

50c6c393ce395f2633000001.jpg (131.39 KiB) Viewed 18216 times

Orginal from this page https://learn.sparkfun.com/tutorials/designing-pcbs-advanced-smd

Do you see anything that looks like that? These can be a real pain to track down.

[Horizenjob]

There is more glamor in this business than people realize!

I've had melted parts hit my face when they explode, you should wear safety glasses, but my generation tends to ignore all that stuff....

[puff]

just to make sure, it has nothing to do with the april fool's day?

[AndreyB]

just to make sure, it has nothing to do with the april fool's day?

not a joke - totally real explosion

[Aquinax]

Ow! Is this signs what my ordered diy constructor may have same issue? Should I steps via pcb with a magnification glass when I get it?

[AndreyB]

Ow! Is this signs what my ordered diy constructor may have same issue? Should I steps via pcb with a magnification glass when I get it?

So far it's just a theory that this is PCB etching problem - there is a chance that it's assembly problem as well.

But yes, it would not hurt to go over the board just in case. At least make sure +12 traces are not connected with the +5 network!

[Rhinoman]

See this picture from a Sparkfun tutorial.

50c6c393ce395f2633000001.jpg

Orginal from this page https://learn.sparkfun.com/tutorials/designing-pcbs-advanced-smd

That should never have left the factory, I would have looked for another supplier.

[kb1gtt]

My comment about being a PCB MFG issue was a speculation. I got it yesterday and hope to look at it soon. I should have not speculated so early.

[AndreyB]

Jared has isolated the via which is the problem: while taking +12 from back side of the board to the front layer it shorts to the +5 middle layer.

[Horizenjob]

Do you guys know why yet? Is it just that individual board?

[kb1gtt]

So far it's just the one board.

This is a reasonably common PCB failure mode and reasonably random issue. I can't seem to find an app note, but I'm expecting it to be a problem with a burr. Basically when they drill the via, you can get a copper burr. The burr on the inner layer then creates the bridge. This kind of issue can commonly be identified by doing an electrical test on the board before assembly. These days that's typically flying lead testing, back in the day it was bed of nails testing.

[kb1gtt]

Hmmm, quote claims tested via flying probe 100% so I'm not quite sure why the failure. I would think that if it was 100% tested, it would need to be an assembly issue. However they don't have components installed in the via's.

[Horizenjob]

For this to happen the 5V plane would need to be shifted a bit so the clearance ring was not enough. The the via plating would short 12V to 5V. Anerror like that should potentially show up other places on the board. Looking at the top and bottom of the via and other vias would give you an idea of how good their registration was on this board between the layers and also the drill holes.

O the clearance ring was insufficient, but they should tell you this when you submit your files.

I wonder if this is a small hole in their testing. Is the testing every via against every via or against every net or power and ground?

[AndreyB]

clearance ring was insufficient, but they should tell you this when you submit your files

What is our current magic number and do we need/can we bump it up?

[kb1gtt]

I'll have to check later as I don't have have the source files at the moment, but I seem to recall the ring is 12mil with a 12mil clearance. This is assuming and 8:8 house, but at 45 degrees that 8:8 would turn into ((8^2)+(8^2))^0.5 = 11.3mil, which is why I generally use 12mil if possible. In this case below is what the MFG has claimed for set backs and such, they would generally be considered a 6:6 house.

[Horizenjob]

One thing I thought would be useful was to add a couple of mils to the pad size. My fab place gave different specs for IPC class 2 and class 3 boards. Class 3 boards are to a higher reliability spec. The issue is even if the drill hole is completely in the pad, it can be right up against where the trace leaves the pad and it can mostly cut the copper connection there. So they spec just a little extra to make sure of a certain amount of copper there. That was the only difference I found in a fairly lengthy list of secs.

So I don't ask for IPC class 3 inspection, but I designed the vias for that.

[kb1gtt]

I see a slight miss of the drill as a potential source for no connection, as you might get something like 50% coverage of your ringlet. If that 50% coverage happens to take out the trace, it would be a no connect. Or I could see it as a long term thermal no-connection issues, as it could create a crack that propagates over thermal cycling and age. I don't see it creating bridge. A missed drill should not bridge through to a clearance opening on a different layer. Also the top layer seems to be spot on center, and I have not found any other bridges on other pads, which indicates to me that the internal layers are aligned. I think this was just a burr or impurity that didn't happen to bridge until it was re-flowed. It would appear the initial re-flow simply had it as an open, then when it was heated up for soldering, it made the connection. Either that or they didn't do the flying probe. I guess the question is, what do we do about this board? I can drill that via, and install a jumper. It's the first R0.4 I've seen, so perhaps it should stay here such that I can better help people. Any how, what to do with it, and how to prevent it in the future. I'll change the set backs on R0.5 to help provide additional protection against such issues and increase yield.

The claimed flying probe test should have caught this issue.

[AndreyB]

Either that or they didn't do the flying probe.

The flying probe, does not it leave some liiiiiiiitle marks? Is it possible to see if there any traces of the board being tested? Maybe at least not on an assembled board but on a plain PCB?

[kb1gtt]

It might or it might not. The probe is usually a gold plated and very low force device, running very low voltages and very low currents. If there are any marks, I would expect them to be in the microscope category.

[kb1gtt]

I held a flashlight on the back side, and looked to see what I could see. I see most via's are reasonably well centered, and have lots of light that gets around the via's. However the VIA by the MOSFET has almost no light. I'm pretty sure that the internal layer simply didn't etch, and that no level of clearances would have helped. This kind of issue is common if you have contamination in your photo etch, or if you don't fully clean a blob of grease off before etching. In the top of this picture you can see lots of light in the VIA that was part of the fuse. However the MOSFET which I'm plugging with a toothpick has almost no light.

IMAG1136_trimmed.jpg (12.28 KiB) Viewed 18081 times

Most via's looks similar to this.

IMAG1132_trimmed.jpg (64.19 KiB) Viewed 18081 times

[Horizenjob]

I see a slight miss of the drill as a potential source for no connection,

Yes, didn't mean to suggest that comment had anything to do with the problem here. It looks like you have very generous antipads, so that's not a problem at all.

[kb1gtt]

I'm seeing I used 8.5mil set back in the flood, this is not normal for me. I'll be changing that to 12mil in R0.5. However the MFG claims to be a 6:6 house, so technically the 8.5 should be fine for the 45 degree thing aka (6^2 + 6^2)^0.5 = 8.48.

[AndreyB]

Fun fact: FT232R seems to survive the +12 input.

[kb1gtt]

Yipee!. How about the MAX9926 and op-amps? Any luck with those?

[AndreyB]

How about the MAX9926 and op-amps?

MCP6004 are fine, hi-side and low-side are obviously fine. I know MAX9926 are fragile and there was no hope - MAX9926 did not survive. I was able to remove it and replace it with a new one, the loaner board is officially good enough.