KiCad questions

Hardware inside and outside of the ECU
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Horizenjob
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KiCad questions

Post by Horizenjob »

I have a question about tenting vias with solder mask. There is a chip on my board that has a ground pad on the bottom. It's used for grounding and also as a heat sink, so there are thermal vias in that pad. The vias should be tented with solder mask to prevent the solder from flowing down the vias during soldering. The package is a TSOP-28. What I wanted was a pattern of solder mask that looked like a "#" symbol that would cover the vias. This is a recommended method in a factory ap-note.

I drew that on the symbol for the footprint on the solder mask layer. It doesn't show up on the Gerber that way though and in fact not on the actual board either, go figure :lol:

It appears that what I drew is treated as a negative image by KiCad. The lines I drew removed solder mask, not added it. How do I do this correctly?
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kb1gtt
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Re: KiCad questions

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I'm not sure I understand your question. Seems everyone does this type of thing differently. If you have a MFG app note that makes a suggestion, that's likely how you should do it, which is likely different than how many people would do it. Do you mean a pattern like this.
padinvia.jpg
padinvia.jpg (42.97 KiB) Viewed 6618 times
The above pattern would help guarantee you have a certain amount of solder contact, but also guarantees you will have a specific amount of no solder. This would be very difficult for the solder paste plate, as there is no supporting material for those little pads. Also you have to control your mask thickness, it's common that you get a .003 thick mask, but often the mask is .0005 thick. If you don't control your mask and paste thickness close enough, you can easily cause the chip to float. Your solder past is typically between .004 and .007, if you chew up .003 in your mask, you can cause floating problems with not having enough paste to catch the flying leads. You need to first specify the specs, then the MFG needs to build to the spec instead of standard processes often used by low cost MFG's, and if you have a problem you need to have inspection equipment which allows you to prove the MFG didn't follow the spec. It's a difficult way to MFG things. See mask dry film thickness noted in this link http://www.multilayer.com/pdf/ManufacturingCapabilities.pdf

Perhaps you mean a pattern like this.
QFN-Paste-1.jpg
QFN-Paste-1.jpg (236.4 KiB) Viewed 6618 times
This is a more common approach. This pattern allows a certain amount of out gassing during re-flow, and generally allows you to fill the majority of the chips thermal slug. The concerns about voids is usually addressed by having a low humidity in your paste, and using a paste with flux that has minimal out gassing. If you don't have proper humidity controls, the boiling trapped gasses usually pop the chip off the board like a piece of popcorn. If your MFG properly controls those two parameters you generally don't have issues with voids under your chips. As well when you let excessive solder to flow into the via's, it prevents the floating issues.

I think you are inquiring about the top picture with lots of masked holes. For that pattern I would likely create a flood on the paste layer that matches the suggested slug area, this allows you to specify the mask clearances which would then make the holes in middle.

If you mean like the bottom picture, I would add those paste pads in the footprint.

I'm not sure there's a real proper solution, as long as you get the pads where you want them, and you get them there efficiently, you have succeeded.
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Horizenjob
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Re: KiCad questions

Post by Horizenjob »

My problem is that I drew what I wanted the solder mask to look like under the chip, but the drawing seems to be a negative image, so none of the solder mask I specified showed up on the board.

In the picture below the magenta area under the chip should be solder mask, but it' missing on the board and the gerber files. The thermal vias are under the solder mask. You can see that on the board on the lower left corner, http://rusefi.com/forum/download/file.php?id=1524. You can tell what I drew is a negative image because the little rounded ends of the lines are showing up as scallop marks on the board.
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Re: KiCad questions

Post by kb1gtt »

I believe the issue is that the red pad from the footprint (module) under your marks on the includes copper, paste and mask. If you go to those pads, you can un-select them. You can also create other pads in your footprint (module) that are only on the mask layer, and again other's that are only on the paste layer. See snap shot below about pad 33 with the three green boxes. It's from KICAD 4.01, so yours might be slightly different. I opened this in the module editor, then hit "e" while holding the mouse over the pad. You can also verify the layers are correct with gerbview. If you see it properly in gerbview it should MFG correctly.
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Horizenjob
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Re: KiCad questions

Post by Horizenjob »

OK, so don't include the mask in the pad creation and then draw the spots that I don't want the mask. That makes sense, now that you point it out. When they print the solder mask, when they are tenting a via they actually leave a microscopic hole in the middle so that cleaning and plating fluids will drain during the process. It's an amazing amount of technology in these boards.

I think the folks that are going to do the assembly can fill those holes, but I'll put this fix in for the next run of boards.

I'm not sure about this place but some of the assembly people I've talked with actually print the solder on the board and don't use a stencil.

Thanks... :)
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Re: KiCad questions

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Glad I could help, and good to hear you got it doing what you wanted.

I understand the hole in tenting is relative to the min drill and max viscosity of the mask which will cause some diameters to leave a hole, and others will completely cover the hole. I would expect that Advanced Circuits min drill with the mask thickness would mean that all holes will have an opening. However other MFG's allow the same min drill hit but have a thicker mask. Those places would completely cover the hole. Typically the mask is nearly the last operation. After the mask you have tinning and silk screening. Both steps generally don't need a washing cycle.

The places that print the solder paste generally cost more. The solder stencil is significantly less over heard. However those printed places can be flipped quick so quicker prototype times. Generally those places aren't aiming for low cost MFG, they are aiming that if they give you a shorter time to market, they will get your prototype work and you'll stick with them when you start production runs. When you become a runner, they generally make a stencil and start using that when they feel it's cost effective. I seem to recall that AAPCB would make a cardboard solder stencil for production runs, which is good for low cost prototype qty, and can be quickly made, but is tossed after the prototype. This was a handy feature as your prototype is made with the same process as your production run. It's common you can have issues when you switch from a printed paste mask to a traditional stencil. Many places have started using etched solder stencils, which are very low cost, typically like $30 while your traditional laser cut stainless stencil was like $300 to $500. The stencil costs have come down allot in recent years. Most people use a place that uses a stencil as it's lower cost and less problems when and if production scales. However if you really need to get your prototype 12 hours earlier, the printed places can do it for a premium.
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Horizenjob
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Re: KiCad questions

Post by Horizenjob »

They were pretty clear about actually printing a hole in the soldermask. Maybe it's the washing cycles after assembly they are concerned about. I was a little surprised the hole would be big enough to help drain the hole.

I'll ask if ACPCB uses a solder stencil. The person who mentioned printing the solder was a little outfit and he couldn't do parts on both sides of the board.
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Re: KiCad questions

Post by kb1gtt »

You generally want the hole to allow for out gassing. The flux will out gas to some extent. When the solder goes eclectic, the solder could seal around those thermal via's while the flux is out gassing and build up pressure. The hole lets it get out with out building pressure.

There might be a washing cycle, or there might be concern that fluid in the via can cause excessive out gassing, which results in pressure / popcorn effect. Either way the hole in the solder mask is a good idea. You can typically make one with a small pin or piece of wire. However that's labor and if you can remove those steps that's a good thing.
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