[help needed] electronic throttle body control ETB

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russian
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Re: electronic throttle body control ETB

Post by russian » Wed Apr 24, 2019 10:52 pm

You have this is about 247 magic metric?

I think my record was closer to 150 but then again that's a random metric on a random test.

Just registered a free webex account, maybe we will record a tune session with @
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Re: electronic throttle body control ETB

Post by 960 » Wed Apr 24, 2019 11:21 pm

With most of the settings I have tested with TPS "hangs" at around 20% at the way down when releasing pedal.

Playing with a non linear bias curve solve it, but hard to get correct.

So a automatic setup would be the most accurate I think.

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Re: electronic throttle body control ETB

Post by russian » Fri Apr 26, 2019 1:33 am

Some boring progress pair tuning session which revealed https://github.com/rusefi/rusefi/issues/775 and https://github.com/rusefi/rusefi/issues/776

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Re: electronic throttle body control ETB

Post by russian » Fri Apr 26, 2019 1:47 am

Is this two throttle bodies on the passenger side of this Lamborghini Murcielago v12 meaning four throttle bodies total?! Not that this is our most immediate concern :)

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Re: electronic throttle body control ETB

Post by Abricos » Fri Apr 26, 2019 1:31 pm

Throttle-Body-Valve-Assembly-0013000325-OEM-62L-V12-Lamborghini-Murcielago-272460829340-4.jpg
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Throttle-Body-Valve-Assembly-0013000325-OEM-62L-V12-Lamborghini-Murcielago-272460829340-2.jpg
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Throttle-Body-Valve-Assembly-0013000325-OEM-62L-V12-Lamborghini-Murcielago-272460829340-6.jpg
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25010150_369399186852316_4303950503567425536_n.jpg
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Re: electronic throttle body control ETB

Post by 960 » Sat Apr 27, 2019 11:48 pm

Is anyone able to translate Chapter ADVE, BGDVE, DDVE and GGDVE to english ?


http://files.s4wiki.com/docs/MED9.1%20TFSI.pdf

or


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Re: electronic throttle body control ETB

Post by 960 » Sun Apr 28, 2019 1:23 am

These chapters are interesting:


3.5 Vorsteuerung des I-Anteils
===============================
Aufgrund der stark nichtlinearen Regelstrecke wird bei einer DK-Bewegung durch den
Notluftpunkt (NLP) und aus dem Bereich des UMA heraus, der I-Anteil ¨uber eine
Vorsteuerung manipuliert.
Befindet sich die DK in der N¨ahe des UMA, so zieht sich der I-Anteil aufgrund der dort
stark erh¨ohten Reibung auf große negative Werte auf. Daher wird, wenn der DK-Sollwert
¨uber die Schwelle DLRUMABAND steigt und sich der I-Anteil auf ¨uber DLRUMAIINI
aufgezogen hat, der I-Anteil auf den kleineren Vorladewert DLRUMAIINI gesetzt.
Bei einer Bewegung der DK durch den NLP findet dort ein Momentensprung mit
Richtungsumkehr statt. Dieser Sprung wird mit einem Delta-I-Anteil DLRININI
kompensiert. Der Ablauf dieser Vorsteuerung ist nachfolgend beschrieben:
Das highword von dlriant_l ist f¨ur Messungen mit dem VS100 in dlriant_w verf¨ugbar.


3.7 digitaler PID-Regler
=========================
Die Reglerstruktur besteht aus einem PID-Regler, wobei der D-Anteil nur mit dem
Istwert gebildet wird. Die Nichtlinearit¨aten der Strecke werden sowohl in den
Kennlinien f¨ur den I-Anteil, als auch in bereichsabh¨angigen Parametern ber¨ucksichtigt.
Eine Bewegung der DK durch den NLP der DV-E wird durch Umladen des I-Anteils
unterst¨utzt, siehe Kapitel 3.2.
Der Regler wird in einem 1 ms - Grundraster und einem 3-fach verschr¨anktem 1 ms -
Raster (entspricht einem 3 ms - Raster) abgearbeitet.
Im 1 ms - Raster werden die Regelabweichung dwdkdlr_w, der D-Anteil, die Summe aller
Regleranteile (dlriant_l, dlrikl_w, dlrpant_l und dlrdant_w) und das PWM-Signal
(Betrag dlrspid_w und Vorzeichen B_dlrspid) berechnet (siehe Bild "pid_controller"
im Block FDEF). Der D-Anteil wird auf +/- 1000 %PWM begrenzt. Zus¨atzlich wird vor
der Bereitstellung des PWM-Signals der resultierende Wert (dlrkomp) aus der Kompensation
und der ver¨anderten Kreisverst¨arkung eingerechnet. Das PWM-Signal ist auf +/- 100 %PWM
begrenzt.
Im 3 ms - Raster werden die einzelnen Raster in der Z¨ahlweise 1 0 -1 1 0 ...
abgearbeitet. Im Raster 1 wird der I-Kleinanteil dlrikl_w berechnet. Dieser IKleinanteil
wird zum Losreißen der DK aus der Haftreibung verwendet. Der I-Kleinanteil
wird auf +/- 100 %PWM begrenzt. Im Raster 0 werden die Reglerparameter in Abh¨angigkeit
von der DK-Position (¨uber/unter NLP mit wdkba_w) und unter dem NLP (wdkba_w <
wdknlp_w) in Abh¨angigkeit von der Sprungh¨ohe des DK-Sollwertes (gwdkdlr_w) bestimmt.
Weiterhin wird hier der I-Anteil dlriant_l berechnet und auf +/- dlriamax begrenzt. Im
Raster -1 wird der P-Anteil berechnet und auf +/- 1000 %PWM begrenzt.
Der I-Klein-Anteil ist ¨uber das Codewort CWDLRIKL = false abschaltbar.
F¨ur den Betrieb des DV-E5 mit unverst¨arktem Potentiometer (B_wdk1v = false) unterm NLP
steht ein eigener Parametersatz zu Verf¨ugung.

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Re: electronic throttle body control ETB

Post by Abricos » Sun Apr 28, 2019 3:15 am

3.5 feedforward control of the I component
===============================
Due to the highly non-linear controlled system is at a DK movement through the
emergency air point (NLP) and out of the range of the UMA, the I component manipulated via a feedforward
control.
If the DK is in the vicinity of the UMA, the I component
absorbs large negative values due to the much higher friction there . Therefore, if the DK setpoint
rises above the threshold DLRUMABAND and the I component has spread to DLRUMAIINI
, the I component is set to the smaller pre-load value DLRUMAIINI.
In a movement of the DK by the NLP there is a momentum jump
Reversal of direction. This jump is
compensated with a delta I component DLRININI . The sequence of this
precontrol is described below: The highword of dlriant_l is available for measurements with the VS100 in dlriant_w.


3.7 digital PID controller
=======================
The controller structure consists of a PID controller, whereby the D component is formed only with the
actual value , The non-linearities of the path are taken into
account both in the characteristic curves for the I-component and in the range-dependent parameters.
A movement of the DK by the NLP of the DV-E is supported by reloading the I-part
, see chapter 3.2.
The controller is processed in a 1 ms basic grid and a 3-fold scaled 1 ms
grid (corresponds to a 3 ms grid).
In the 1 ms grid, the control deviation dwdkdlr_w, the D component, the sum of all
controller components (dlriant_l, dlrikl_w, dlrpant_l and dlrdant_w) and the PWM signal
(amount dlrspid_w and sign B_dlrspid) are calculated (see figure "pid_controller"
in block FDEF) ). The D component is limited to +/- 1000% PWM. Additionally, before
providing the PWM signal, the resulting value (dlrkomp) from the compensation
and the changed loop gain is included. The PWM signal is limited to +/- 100% PWM
.
In 3 ms - scanning the individual pixels in the Z¨ahlweise 1 0 -1 0 1 ... are
processed. In grid 1, the small I component dlrikl_w is calculated. This small amount
is used to tear the DK out of static friction. The low I component
is limited to +/- 100% PWM. In grid 0, the controller parameters are determined as a function
of the DK position (above / below NLP with wdkba_w) and below the NLP (wdkba_w <
wdknlp_w), depending on the jump height of the DK setpoint (gwdkdlr_w) ,
Furthermore, the I component dlriant_l is calculated here and limited to +/- dlriamax. In
grid -1, the P component is calculated and limited to +/- 1000% PWM.
The I-Klein component can be switched off via the codeword CWDLRIKL = false.
For the operation of the DV-E5 with an unknown potentiometer (B_wdk1v = false) under NLP
, a separate parameter set is available.

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Re: electronic throttle body control ETB

Post by Abricos » Sun Apr 28, 2019 3:29 am

ADVE

APP VPSKO 3.40.1 Application Notes
Underlying for first application:
CWVPSKO = 0
CWVPSKO: Bit 0 = true: to the application, as long as the torque structure is not applied, MIN (PSSCHAP and psmxschs_w) can be specified
Bit 0 = false: normal operation
Bit 1 = true: for the application: Specify psxhmms_w directly in the HMM mode via PSHMMSP
Bit 1 = false: normal operation
Bit 2 = true: for the application: in the HOS mode, specify psxhoss_w directly via PSHOSSP
Bit 2 = false: normal operation
Bit 3 = true: for application: Specify psxschs_w directly via PSSCHSP in SCH mode
Bit 3 = false: normal operation
Bit 4 = true: for the application: in the SKH mode, specify psxskhs_w directly via PSSKHSP
Bit 4 = false: normal operation
Bit 5 = true: to the application, as long as the torque structure is not applied, the map is addressed via rk
Bit 5 = false: normal operation
KFPSMXRKAP for application as long as the torque structure is not yet filled. However, care should be taken not to
all maps have 10 x 10 stucco points but in some cases less stubs
KFPSMXHMM the mapping of the 3 maps from the optimization of e.g. Flammability, consumption, .... from
KFPSMXHOS
KFPSMXSCH
Note:
An excessively large number of support points for the project (for example in the map KFPSMXSCH) can be obtained by equal treatment of adjacent ones
Reduce support points (and associated map values) during integration.
PSSKHAP = 900 hPa
PSHMMAP = 900 hPa
PSHOSAP = 900 hPa
PSSCHAP = 900 hPa
FU ADVE 10.20.0 Control of the DV-E with the DLR
FDEF ADVE 10.20.0 Function definition
Main:
-------
Check_of_battery_voltage
if
if not
Monitoring_of_position
SY_UBR 0
Switch_on_coordination_of_powerstage
Digital_PID_controller
Monitoring_of_PID_rang

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Re: electronic throttle body control ETB

Post by 960 » Sun Apr 28, 2019 3:53 am

Just checked some flash files in winols, and found ADVE with all the constants:
ADVE_Winols.jpg
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Re: electronic throttle body control ETB

Post by OrchardPerformance » Sun Apr 28, 2019 2:57 pm

Abricos wrote:
Sun Apr 28, 2019 3:15 am
3.5 feedforward control of the I component
===============================
Due to the highly non-linear controlled system is at a DK movement through the
emergency air point (NLP) and out of the range of the UMA, the I component manipulated via a feedforward
control.
If the DK is in the vicinity of the UMA, the I component
absorbs large negative values due to the much higher friction there . Therefore, if the DK setpoint
rises above the threshold DLRUMABAND and the I component has spread to DLRUMAIINI
, the I component is set to the smaller pre-load value DLRUMAIINI.
In a movement of the DK by the NLP there is a momentum jump
Reversal of direction. This jump is
compensated with a delta I component DLRININI . The sequence of this
precontrol is described below: The highword of dlriant_l is available for measurements with the VS100 in dlriant_w.


3.7 digital PID controller
=======================
The controller structure consists of a PID controller, whereby the D component is formed only with the
actual value , The non-linearities of the path are taken into
account both in the characteristic curves for the I-component and in the range-dependent parameters.
A movement of the DK by the NLP of the DV-E is supported by reloading the I-part
, see chapter 3.2.
The controller is processed in a 1 ms basic grid and a 3-fold scaled 1 ms
grid (corresponds to a 3 ms grid).
In the 1 ms grid, the control deviation dwdkdlr_w, the D component, the sum of all
controller components (dlriant_l, dlrikl_w, dlrpant_l and dlrdant_w) and the PWM signal
(amount dlrspid_w and sign B_dlrspid) are calculated (see figure "pid_controller"
in block FDEF) ). The D component is limited to +/- 1000% PWM. Additionally, before
providing the PWM signal, the resulting value (dlrkomp) from the compensation
and the changed loop gain is included. The PWM signal is limited to +/- 100% PWM
.
In 3 ms - scanning the individual pixels in the Z¨ahlweise <Copy error "Zählweise" "counting" 1 0 -1 0 1 ... are
processed. In grid 1, the small I component dlrikl_w is calculated. This small amount
is used to tear the DK out of static friction. The low I component
is limited to +/- 100% PWM. In grid 0, the controller parameters are determined as a function
of the DK position (above / below NLP with wdkba_w) and below the NLP (wdkba_w <
wdknlp_w), depending on the jump height of the DK setpoint (gwdkdlr_w) ,
Furthermore, the I component dlriant_l is calculated here and limited to +/- dlriamax. In
grid -1, the P component is calculated and limited to +/- 1000% PWM.
The I-Klein component can be switched off via the codeword CWDLRIKL = false.
For the operation of the DV-E5 with an unknown potentiometer (B_wdk1v = false) under NLP
, a separate parameter set is available.
DLRUMABAND - Uncertainty band at jump from UMA area
DLRUMAIINI - Precharge value I component for jump from UMA range
DLRININI - I share at initiation of the NLP function
DK - DrosselKlapp - Throttle Flap
NLP - Notluftpunkt - Emergency air point (limp home angle?)
DV-E or DV-E5 - Bosch ETB for this generation
FDEF - Funktion Definition
UMA - Overwatch/watchdog concept for shutdown path (I think?) - might be closed position but the document is unclear on the definition of UMA

dwdkdlr_w - Differential throttle angle setpoint - actual value
dlriant_l - DLR, I share
dlrikl_w - DLR, I-small share
dlrpant_l - DLR, P share
dlrdant_w - DLR, P small share
dlrspid_w - DLR for DV-E: Sum of PID shares
B_dlrspid - Condition: DLR, sign of the sum of the PID components, = 1: positive, = 0: negative
dlrkomp - DLR, factor loop gain
wdkba_w - Throttle angle related to lower stop
wdknlp_w - DK angle of the emergency air position
gwdkdlr_w - Change of throttle target angle, amount for characteristic input
dlriamax - DLR, maximum possible I share
CWDLRIKL - Codeword: DLR-I-small share active
B_wdk1v - Condition Calculation of the DK angle from amplified signal from potentiometer 1

DLR - Delta Torque for Idle speed control

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Re: electronic throttle body control ETB

Post by 960 » Sun Apr 28, 2019 3:39 pm

ADVE Functions:

Code: Select all


/************************************************************************/
/*					Module Internal Definitions    						*/
/************************************************************************/

/* Define-Constants														*/
/* ================														*/

#define		IANT_MIN		-511	/* -100 % in high-part of dlriant_l */
#define		IANT_MAX		511		/* 100 % in high-part of dlriant_l	*/
#define		POTI_MASK 		0xFFFC
/*#define	WDKS_KONST		5872026l */
/*#define	CORR_WDKS		(WDKS_KONST / MICROSECONDS_TO_TICKS(10000)) */
#define		CORR_WDKS		179
#define		CORR_UB			128
#define		REL_2			255
#define		HUNDRED_PERCENT	4095	/* 100 % of range -800..800*/
#define		INIT_DLRBAT		0x8000	/* = 1 (16 Bit)	*/
#define		INIT_DLRI		16		/* 1 % 			*/
#define		P5OF100			328u	/* 0,5 of range 100 % */
#define		P5OF1600		20	/* 0,5 of range -800..800 % */

#define		DANTMAX			 5120	/*  1000 %PWM, q = 0.19531%PWM */
#define		DANTMIN			-5120	/* -1000 %PWM, q = 0.19531%PWM */

#define		MAXDK			 4095	/*  100 %DK, q = 0.02441 */
#define		MINDK			-4095	/* -100 %DK, q = 0.02441 */

#define		MAXDLRPANT		 4095	/*  800 %PWM, q = 0.19531 */
#define		MINDLRPANT		-4095	/* -800 %PWM, q = 0.19531 */

#define		MAXDLRIKL		 512	/*  100 %PWM, q = 0.19531 */
#define		MINDLRIKL		-512	/* -100 %PWM, q = 0.19531 */

#define		MAXELEMENT		31		/*  32 table-values */
#define		MAXELEMENTSHL	248		/*  32 table-values */

/* Macros Local To This Module											*/
/* ===========================											*/



/* Local Module RAM-Definitions (attribute static)						*/
/* ===============================================						*/

/* Definition of variables only local to this module. That is, not to 	*/
/* be exported to other modules and not relevant for calibration. 		*/

/*static	<data type>		<name>;										*/

/* Local Prototypes (attribute static)									*/
/* ===================================									*/

/* Declarations (Prototypes) of functions, only used in this module   	*/

static void dlrber_test(void);


/* module description

function:	drive of DVE with digital attitude control
			(Ansteuerung des DVE mit dem digitalen Lageregler)

*/

/* modul inputs       */
/**************************************************************************/
/* dlrd				   		0 .. 1020 %PWM/%DK	 8 Bit	q=4 %PWM/%DK	  */
/* dlrdant_w			-1000 .. 1000 %PWM		14 Bit	q=0.19531 %PWM	  */
/* dlri			   		   0 ...  16  %PWM/%DK 	 8 Bit	q=0.0625 %PWM/%DK */
/* dlriant_l			-100 ... 100  %PWM		26 Bit	q=2.98e-6 %PWM	  */
/* highword dlriant_l	-100 ... 100  %PWM		10 Bit	q=0.19531 %PWM	  */
/* dlrikl_w				-100 ... 100  %PWM		10 Bit	q=0.19531 %PWM	  */
/* dlrndif_w			-200 ... 200  %DK		14 Bit	q=0.02441 %DK	  */
/* dlrpant is tempS16	-800 ... 800  %PWM		14 Bit	q=0.19531 %PWM	  */
/* dlrspid_w		   	   0 ... 100  %PWM		16 Bit	q=1.53e-3 %PWM	  */
/* dwdkdlr_w			-200 ... 200  %DK		14 Bit	q=0.02441 %DK	  */
/* dwdkdlra_w			-200 ... 200  %DK		14 Bit	q=0.02441 %DK	  */
/* dwdks_w				 -50 ...  50  %DK		16 Bit	q=1.53e-3 %DK	  */
/* wdkba_w				-200 ... 200  %DK		14 Bit	q=0.02441 %DK	  */
/* wdkbaalt_w			-200 ... 200  %DK		14 Bit	q=0.02441 %DK	  */
/* wdknlp_w		   		   0 ... 100  %DK		16 Bit	q=1.53e-3 %DK	  */

/* modul outputs      */

/*****************************************************************************/


/************************************************************************/
/*					Local Process Definitions		           			*/
/************************************************************************/

#define START_SECTION_Task_r10ms
#include "pragma.h"
static	void dlrber_test(void)
{
  	if( dlrpidc_w > KW_DLRPID2T )
  	{
		SET_B_dlrpide;		/* set error DLR control range at limitstop */

	#if (SY_CJ230 > 0)
		dveestatm = dveestat;
		if (dveestat>0)
		{
		  	SET_B_dveese;	/* set DVE powerstage error */
		}
	#else
		if (!GET_B_dveeson)
		{
		  	SET_B_dveese;	/* set DVE powerstage error */
		}
	#endif
  	}
  	else
  	{
    	if( dlrpidc_w > KW_DLRPID1T )
    	{
	#if (SY_DVEAIF > 0)
			if( ! (!GET_B_stend && (nmot < KW_DWDKNMOMIN) && ((tmot < KW_DWDKTMIN) || (tans < KW_DWDKTMIN)) ) )
			{
				SET_B_dlrbe;
			}
	#else
			SET_B_dlrbe;	/* request for rev. SKA */
	#endif
		}
		else
		{
	  		if( ! GET_B_dlrspi10 && (dlrpidc_w > KW_DLRPID0T) && (nmot == 0) )
	  		{
				SET_B_dvete; 	/* extended exchange detection */
	  		}
		}

		dlrpidc_w++;		/* increment error counter (no OV, we are < DLRPID2T) */
		dlrpidrc_w++;		/* increment ice break error counter (no OV, we are < DLRPID2T)*/

		if( ! GET_B_dveeson )
		{
		/* attempt for DVE powerstage healing (Powerstage_restart_test)*/

	  		if( dveesc >= KW_DVEEST )
	  		{
	  			CLR_B_dveesh; 	/* reset switch-off-request of DVE powerstage */
	  		}
	  		else
	  		{
	    		dveesc++;		/* increment antibeat counter */
				if( dveesc >= KW_DVEEST)
				{
		  			SET_B_dveesh;	/* set switch-off-request of DVE powerstage */
				}
	  		}
		}
		else
		{
	  		dveesc = 0;		/* reset antibeat counter */
		}
  	}
}
#define STOP_SECTION_Task_r10ms
#include "pragma.h"


/************************************************************************/
/*					Global Process Definitions		           			*/
/************************************************************************/

/***********************************************************************/
/*	process: adve_ini2												   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_rini2
#include "pragma.h"

void adve_ini2(void)
{
	dlrkomp = KW_DLRKREIS;
	dlrbatkp_w = INIT_DLRBAT;
	dlrp = KW_DLRKPONLP0;
	dlri = INIT_DLRI;
	dlrd = KW_DLRKDONLP0;
	SET_B_dlrparc;
	SET_B_dlrumzu;

#if (SY_UBR == 0)
	SET_B_ubdve;
	SET_B_ubpvg;
	SET_B_ub_ok;		/* battery voltage is OK */
#endif

	dlrrast = 2;

	/************************************************************/
	/* dlrhaftak	9 Bit  -100 ... 0 %	PWM	q=0,1953125 % PWM	*/
	/* DLRHAFTMN	9 Bit  -100 ... 0 %	PWM	q=0,1953125 % PWM	*/
	/* DLRININI		9 Bit   0 ... 100 %	PWM	q=0,1953125 % PWM	*/
	/* DLRKREIS		8 Bit	0.1 ... 2			q=7,8125e-3		*/
	/************************************************************/

  	dlrhaftak = (sint16)(((sint32)KW_DLRHAFTMN << 7) / KW_DLRKREIS);

  	if( dlrhaftak < (sint16) IANT_MIN )	/* limitation to -100 % PWM */
  	{
		dlrhaftak = (sint16) IANT_MIN;
  	}

  	dlrini_w  = (KW_DLRININI << 7 ) / KW_DLRKREIS;
  	if( dlrini_w > IANT_MAX )		   /* limitation to 100 % PWM */
  	{
	dlrini_w = IANT_MAX;
  	}

  	SET_B_nldve1;

#if (SY_UBR > 0)

	SET_B_nldve;

  	/*** Battery voltage check BCHECK_1SG ***/
  	if ( GET_B_ubdve )
  	{
  	  	if ( ubrsq < SY_UBDEDIQ )	/* ub less than 7 V ? */
	  	{
		  	CLR_B_ubdve;
		  	CLR_B_ubpvg;
	  	}
  	}
  	else
  	{
  	  	if ( ubrsq > SY_UBDEENQ )	/* ub greater than  8 V ? */
	  	{
		  	SET_B_ubdve;
		  	SET_B_ubpvg;
	  	}
  	}

#if (SY_ACCSSRY > 0)
  	PUT_B_ub_ok( GET_B_ubdve && !GET_B_nachl);
#else
  	PUT_B_ub_ok( GET_B_ubdve && GET_B_kl15);
#endif

#endif
	/* for ICE-funktion */
  	SET_B_wdksg;    /* Set 'all seems well'-Signal */
}
#define STOP_SECTION_Task_rini2
#include "pragma.h"

/***********************************************************************/
/*	process: adve_1ms												   */
/*	purpose: 														   */
/***********************************************************************/
#define START_SECTION_Task_r1ms
#include "pragma.h"

void adve_1ms(void)
{

/* Das 1 ms Raster teilt sich in verschiedene Bereiche auf. Ein Teil, der bei jedem	*/
/* Durchlauf berechnet wird, drei Teile, die jeweils nur bei jedem dritten Durch-	*/
/* lauf gerechnet werden. Im ersten Teil werden Regelabweichung, Aktivierungs-		*/
/* schwellen für den D-Anteil, D-Anteil und das PWM-Tastverhältnis berechnet. Zudem	*/
/* erfolgt in diesem Teil die Ausgabe in den PWM-Kanal.								*/
/* Im 'case 2' des geteilten Rasters wird abhängig von B_dlrikla der I-Kleinanteil	*/
/* berechnet. In 'case 1' werden die Reglerparameter abhängig von NLP und der 		*/
/* I-Anteil bestimmt. Im letzten Teil ('case 0') wird der P-Anteil berechnet und	*/
/* die Summe von I-, P- und I-Klein-Anteil gebildet.								*/

	sint16		tempS16;
	uint16		tempU16;
	uint16		abs_dwdkdlr_w;
	uint16		abs_gwdkdlr_w;
	LInt		tempS32;
	uint8		tabindex;


	if ( ! GET_B_nldve1 )
	{
		return;
	}
  	#if (SY_DVEKOOR == 1)
	tempS16 = wdkdlr_w - wdkbak_w;
  	#else
	tempS16 = wdkdlr_w - wdkba_w;
  	#endif

	if (tempS16 >= MAXDK)		/* limit max. and min. DK-deviation */
	{
		dwdkdlr_w = MAXDK;
	}
	else if (tempS16 <= MINDK)
	{
		dwdkdlr_w = MINDK;
	}
	else
	{
		dwdkdlr_w = tempS16;
	}

	if(GET_B_wdk1v)					/* DK-angle from pot 1 */
	{
		dlrdsv_w = DANTGESWV;
		dlrdsw_w = DANTSCHWV;
	}
	else
	{
		dlrdsv_w = DANTGESWNV;
		dlrdsw_w = DANTSCHWNV;
	}

  	#if (SY_DVEKOOR == 1)
	dlrndif_w = wdkbaalt_w - wdkbak_w;
	wdkbaalt_w = wdkbak_w;		/* save actual value */
  	#else
	dlrndif_w = wdkbaalt_w - wdkba_w;
	wdkbaalt_w = wdkba_w;		/* save actual value */
  	#endif


	if ((dlrndif_w >= dlrdsv_w) || (-dlrndif_w >= dlrdsv_w) || (dwdkdlr_w > dlrdsw_w) || (-dwdkdlr_w > dlrdsw_w))
	{
		tempS16 = (sint16)((dlrndif_w * dlrd) >> 1);	/* q = 0.19531%PWM = (0.02441%DK * 4%PWM/%DK) * 2 */
		if (tempS16 >= DANTMAX)
		{
			tempS16 = DANTMAX;
		}
		else
		{
		  if (tempS16 <= DANTMIN)
		  {
			tempS16 = DANTMIN;
		  }
		}
		tempS16 += sum_ipikl_w;		/* sum_ipikl_w  14bit  q = 0.19531%PWM */
	}									/* the calculation of sum_ipikl is at the end of dlrrast = -1 */
	else
	{
		tempS16 = sum_ipikl_w;
	}

	/* dlrspid_w = sum_ipikl_w * dlrkomp							*/
	/********************************************************************/
	/* q = 0.001526 %PWM = 0.19531 %PWM * 0.00781						*/
	/*     0.001526 %PWM = 0.001526 %PWM  -> no correction necessary !	*/
	/*																	*/
	/* limit dlrspid_w to 100 %PWM means range of 16 bit -> o.k.		*/

	if (tempS16 >= 0)
	{
		SET_B_dlrspid;
		dlrspid_w = MulU16((uint16)tempS16,dlrkomp);
	}
	else
	{
		CLR_B_dlrspid;
		dlrspid_w = MulU16((uint16)-tempS16,dlrkomp);
	}

	/* Output PWM-signal */
	/*********************/

	/* Output of PWM-signal moved to HT2KTDVE */

	/* DISTORTED */

	dlrrast--;

	if (dlrrast == 1)
	{
		/************** Raster 2 (dlrrast = 1) **************/
		/*==================================================*/

		if (GET_B_dlrikla && (KW_CWDLRIKL > 0))
		{
			/*LRG_GO*/
			if (GET_B_dlriklst)
			{
				dwdkdlra_w = dwdkdlr_w;
  				#if (SY_DVEKOOR == 1)
				wdkbas_w = wdkbak_w;
  				#else
				wdkbas_w = wdkba_w;
  				#endif
				CLR_B_dkbew;
				CLR_B_dlriklst;
			}
			else
			{
				/*STOPIKLEIN*/
				if ( ((dwdkdlr_w <= 0) && (dwdkdlra_w >= 0)) || ((dwdkdlr_w >= 0) && (dwdkdlra_w <= 0)) )
				{
					CLR_B_dlrikla;	/*ClrBdlri*/
				}
			}

			/*DK-Bewegung*/
			if (!GET_B_iklrest)
			{
  				#if (SY_DVEKOOR == 1)
				if (wdkbak_w >= wdkbas_w)
				{
					tempU16 = (uint16)(wdkbak_w - wdkbas_w);
				}
				else
				{
					tempU16 = (uint16)(wdkbas_w - wdkbak_w);
				}
  				#else
				if (wdkba_w >= wdkbas_w)
				{
					tempU16 = (uint16)(wdkba_w - wdkbas_w);
				}
				else
				{
					tempU16 = (uint16)(wdkbas_w - wdkba_w);
				}
  				#endif

				if ((tempU16 > KW_WDKBEWS) && !GET_B_dkbew)
				{
					dlriklst_w = dlrikl_w;
					SET_B_dkbew;
				}
			}

			if (GET_B_dlrikla && !GET_B_dcdisfr)
			{
				/*IKleinant*/

				/* dlrikl_w += dwdkdlr_w * DLRIKLPAR					*/
				/********************************************************/
				/* dwdkdlr_w limited to 100%DK (12bit signed)			*/
				/* 0.19531%PWM += 0.02441%DK * 0.0625%PWM/%DK / corr	*/
				/* 0.19531%PWM += 0.0015256%PWM / corr					*/
				/* -> corr = 1/2^7 = (2^2 * 2^7) / 2^16					*/

				tempS32.lng = ((sint32)dwdkdlr_w << 2) * ((sint32)KW_DLRIKLPAR << 7);

				tempS16 = tempS32.wrd.h + dlrikl_w;
				if (tempS16 >= MAXDLRIKL)
				{
					dlrikl_w = MAXDLRIKL;
				}
				else if (tempS16 <= MINDLRIKL)
				{
					dlrikl_w = MINDLRIKL;
				}
				else
				{
					dlrikl_w = tempS16;
				}
			}
			else
			{
				dlrikl_w = 0;
			}
			dwdkdlra_w = dwdkdlr_w;
		}
		else
		{
			if (GET_B_dcdisfr)
			{
				dlrikl_w = 0;
			}
		}
	}
	else if (dlrrast == 0)
	{
		/************** Raster 1 (dlrrast = 0) **************/
		/*===================================================*/

		if (dwdkdlr_w >= 0)
		{
			abs_dwdkdlr_w = (uint16)dwdkdlr_w;
		}
		else
		{
			abs_dwdkdlr_w = (uint16)(-dwdkdlr_w);
		}

		if (abs_dwdkdlr_w >= MAXELEMENTSHL)
		{
			tabindex = MAXELEMENT;
		}
		else
		{
			tabindex = (uint8)(abs_dwdkdlr_w >> 3);
		}

  	#if (SY_DVEKOOR == 1)
		if (wdkbak_w >= (sint16)(wdknlp_w >> 4))
  	#else
		if (wdkba_w >= (sint16)(wdknlp_w >> 4))
  	#endif
		{
			dlrp = KW_DLRKPONLP0;
			dlrd = KW_DLRKDONLP0;
			dlri = KWB_DLRKIONLP0(tabindex);
		}
		else
		{
			if( GET_B_wdk1v )
			{
				if (GET_B_dlrparc)
				{
					/*** abs_gwdkdlr_w ***/
					if( gwdkdlr_w < 0)
					{
						if ( gwdkdlr_w == MININT16)
						{
							abs_gwdkdlr_w = MAXINT16;	/* 8000h --> 7FFFh */
						}
						else
						{
							abs_gwdkdlr_w = (Word)-gwdkdlr_w;
						}
					}
					else
					{
						abs_gwdkdlr_w = (Word) gwdkdlr_w;
					}

					if (abs_gwdkdlr_w > DLRDWDKSS1)
					{
						dlrp = KW_DLRKPUNLP0;
						dlrd = KW_DLRKDUNLP0;
						dlri = KWB_DLRKIUNLP0(tabindex);
					}
					else if (abs_gwdkdlr_w > DLRDWDKSS2)
					{
						dlrp = KW_DLRKPUNLP1;
						dlrd = KW_DLRKDUNLP1;
						dlri = KWB_DLRKIUNLP1(tabindex);
					}
					else
					{
						dlrp = KW_DLRKPUNLP2;
						dlrd = KW_DLRKDUNLP2;
						dlri = KWB_DLRKIUNLP2(tabindex);
					}
				}
				else	/* B_dlrparc == FALSE */
				{
					if (abs_dwdkdlr_w > (DLRDWDKSS1>>4))
					{
						dlrp = KW_DLRKPUNLP0;
						dlrd = KW_DLRKDUNLP0;
						dlri = KWB_DLRKIUNLP0(tabindex);
					}
				}
			}
			else
			{
				dlrp = KW_DLRKPUNLP3;
				dlrd = KW_DLRKDUNLP3;
				dlri = KWB_DLRKIUNLP3(tabindex);
			}
		}

		dlriant_l.lng += (((Int32)dwdkdlr_w << 2) * ((Int32)dlri << 7));
		if (dlriant_l.wrd.h <= (sint16)-dlriamax)
		{
			dlriant_l.wrd.h = (sint16)-dlriamax;
			dlriant_l.wrd.l = 0;
		}
		else
		{
			if (dlriant_l.wrd.h >= (sint16)dlriamax)
			{
				dlriant_l.wrd.h = (sint16)dlriamax;
				dlriant_l.wrd.l = 0;
			}
		}
	}
	else
	{
		/************** Raster 0 (dlrrast = -1) **************/
		/*===================================================*/

		tempS32.lng = (sint32)dwdkdlr_w * dlrp;
		if (tempS32.lng >= MAXSINT16)
		{
			tempS16 = MAXDLRPANT;
		}
		else if (tempS32.lng <= MINSINT16)
		{
			tempS16 = MINDLRPANT;
		}
		else
		{
			tempS16 = (sint16)(tempS32.lng>>3);
		}

		sum_ipikl_w = tempS16 + dlriant_l.wrd.h;
		sum_ipikl_w += dlrikl_w;
		dlrrast = 2;
	}
}
#define STOP_SECTION_Task_r1ms
#include "pragma.h"

/***********************************************************************/
/*	process: adve_10ms												   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_r10ms
#include "pragma.h"

void adve_10ms(void)
{
  	Word dlrspid10_w;	/* Copy of dlrspid_w from 1 ms process */
  	Int16 dwdkdlr10_w;	/* Copy of dwdkdlr_w from 1 ms process */
  	/* Take care! dwdkdlr10_w	is only used once and changed to ABS(dwdkdlr10_w)!! */
  	Int16 sollwert_w;
  	Int16 temp_S16;

 #if (SY_UBR > 0)
	if( !GET_B_nldve )
	{
		return;
	}
#endif

	PUT_B_dlrspi10(GET_B_dlrspid);
	dlrspid10_w = dlrspid_w;
	dwdkdlr10_w = dwdkdlr_w;

	/* Quantizations: ***************************************/
	/*														*/
	/* DKNOTBEGR	0 ... 100 %DK	8 Bit	q=0,3906 %DK	*/
	/* dknbegr_u16	0 ... 100 %DK  12 Bit	q=0,02441 %DK	*/
	/* wdkdlr_w		0 ... 100 %DK  12 Bit	q=0,02441 %DK	*/
	/* wdkdlrz_w	0 ... 100 %DK  12 Bit	q=0,02441 %DK	*/
	/* gwdkdlr_w  -50 ...  50 %DK  16 Bit	q=1,526e-3 %DK	*/
	/* wdks_w		0 ... 100 %DK  16 Bit	q=1,526e-3 %DK	*/
	/* wdkada_w		0 ... 100 %DK  16 Bit	q=1,526e-3 %DK	*/
	/*														*/
	/********************************************************/

	/********************************************************/
	/* 		function: registration set value 				*/
	/********************************************************/

	if( GET_B_dkaden )
	{
		sollwert_w = (sint16)(wdkada_w >> 4);
	}
	else
	{
		if( GET_B_appnolu )
		{
			if( GET_B_dkp1e || GET_B_dkp2e || GET_B_i_ska_um || ! GET_B_ubdve
			|| GET_B_wdksive || GET_B_dlrbe || GET_B_dlrpide || GET_B_dknot)
			{
				CLR_B_appnolu;
  			    sollwert_w = (sint16)(wdks_w >> 4);
			}
			else
			{
				sollwert_w = KW_WDKSAPNOL;
			}
		}
		else
		{
  			if (GET_B_dknolu)
			{
				sollwert_w = (sint16)((sub_U16U16_U16(wdknlp_w,P5OF100))>> 4);  /* only positive range used! */
			}
			else
			{
  #if (SY_DVEAIF == 3)
				if (GET_B_dkeisakt)
				{
				  	sollwert_w = (sint16)(wdklosbs_w >> 4);	/* icefunction-throttle-preset */
				}
				else
  #endif
				{
				  	sollwert_w = (sint16)(wdks_w >> 4);		/* throttle-preset */
				}
			}
		}

  		wdkdlrz_w = sollwert_w ;

	#if (SY_DVEKOOR == 1)
		sollwert_w = sollwert_w + wdkoff_w;
		/* else	sollwert_w not changed */
	#endif
	#if (SY_DKZEROP == 1)
  		if (sollwert_w < KW_WDKLIMIT )
  		{
  		if (GET_B_edks)
		{
  		#if (SY_DVEKOOR == 1)
			temp_S16 = wdkbak_w;
  		#else
			temp_S16 = wdkba_w;
		#endif
		}
		else
		{
  		#if (SY_DVEKOOR == 1)
  			temp_S16 = MINIMUM(wdk1k_w,wdk2k_w);
	  			temp_S16 = MINIMUM(temp_S16,wdkbak_w);
  		#else
  			temp_S16 = MINIMUM(wdk1_w,wdk2_w);
	  			temp_S16 = MINIMUM(temp_S16,wdkba_w);
		#endif
		}

  			if (temp_S16 >= (KW_WDKLIMIT + P5OF1600))
			{
				sollwert_w = KW_WDKLIMIT;
			}
			else
			{
				sollwert_w = MAXIMUM((wdkdlr_w - KW_WDKSTEP),sollwert_w);
			}
  		}
		/* else	sollwert_w not changed */
	#endif
	}
  	if (sollwert_w < 0)
  	{
		sollwert_w = 0;
  	}
  	else
  	{
	  	if (sollwert_w > HUNDRED_PERCENT )
	  	{
	  		sollwert_w = HUNDRED_PERCENT;
	  	}
	}
	if( GET_B_wdk1v )		/* Poti 1 amplified ? */
	{
		wdkdlr_w = sollwert_w ;	/* no mask, on account of accuracy of ampl. poti 1 */
	}
	else
	{
	wdkdlr_w = (sint16)((uint16)sollwert_w  & POTI_MASK);	/* adaption on not amplified poti 1 */
	}
						   		/* 0..100            		0..100  from -800..800*/
  	gwdkdlr_w = sub_U16U16_S16((((Word)wdkdlr_w) << 4), (((Word)wdkdlra_w) << 4)) ;
	wdkdlra_w = wdkdlr_w;

	/********************************************************/
	/* 		end function: registration set value 			*/
	/********************************************************/

	/********************************************************/
	/* 		function: power save function		 			*/
	/********************************************************/

  	if(!GET_B_dkaden && (wped <= KW_MAXWPEDPWS) && (nmot == 0)
#if( SY_STASTO > 0)
	  && ! GET_B_staanf
#endif
#if (SY_TWDKS > 0)
	  && ! GET_B_cwdk
#endif
	  )
	{
	if( dpwrsvc < KW_TPWRSV )
		{
			dpwrsvc++;
		}
		else
		{	/* switch off power stage */
			SET_B_pwrsv;
		}
	}
	else
	{	/* reset counter for powersave */
		dpwrsvc = 0;
		CLR_B_pwrsv;
	}

	/********************************************************/
	/* 		end function: power save function		 		*/
	/********************************************************/

	/********************************************************/
	/* 		function: manipulation of I quota				*/
	/********************************************************/

	/*** absgwdkdlr ***/
	if( gwdkdlr_w < 0)
	{
    	if ( gwdkdlr_w == MININT16)
    	{
    		temp_S16 = MAXINT16;	/* 8000h --> 7FFFh */
    	}
    	else
    	{
    		temp_S16 = -gwdkdlr_w;
    	}
  	}
  	else
  	{
  		temp_S16 =  gwdkdlr_w;
   	}

	if (KW_CWDLRIKL > 0)
	{
	/*** Initialization of small I-quota ***/
	/*   determination of start conditions */

		CLR_B_iklstar;

    	if( temp_S16 > 0)
		{
			SET_B_dlrparc;
  	  		if( gwdkdlr_w < 0)
  	  		{
  	    		CLR_B_wdksauf;
  	  		}
  	  		else
  	  		{
  	    		SET_B_wdksauf;
	  		}
			/** start conditions small-I-quota */
  	  		if( (temp_S16>>4) <= KW_DWDKSIKLS )
			{
				if( ! GET_B_dlrikla )
				{
					CLR_B_iklrest;	/* No restart, due to change of set value */
				}
				SET_B_iklstar;		/* Condition for start small-I-quota met */
			}
		}
		else
		{
      		CLR_B_dlrparc;
			/* restartconditions of small I-quota no changes of set value */
			/*absolute value of dwdkdlr_w */
  	  		if( dwdkdlr10_w < 0 )	   /* MININT not possible */
  	  		{
  	    		dwdkdlr10_w = -dwdkdlr10_w;
  	  		}

  	  		if((dwdkdlr10_w <= KW_DWDKSIKLS) && (( GET_B_wdk1v && (dwdkdlr10_w >= KW_WDKSTFEIN)) ||
  		  		( !GET_B_wdk1v && (dwdkdlr10_w >= KW_WDKSTGROB) )) )
			{
				if( ! GET_B_dlrikla )
				{
					SET_B_iklrest;	/* restart, as there is no change of set value */
				}
				SET_B_iklstar; 	/* Condition for retrigger small-I met */
			}
		}

		/* If there is a great leap of set value, small-I-quota is deactivated and set to zero */

    	if ( (temp_S16>>4) > KW_DWDKSIKLS )
		{
			CLR_B_dlrikla;
			dlrikl_w = 0;
		}

		/* Activation/Deactivation of small-I-quota */
		if( ! GET_B_dlrikla && GET_B_iklstar )
		{
			SET_B_dlrikla;		/* set small-I */
			SET_B_dlriklst;		/* set 'small-I start' */

			/* Initialize parameters for small-I */
			if( GET_B_iklrest )
			{
				dlrikl_w = 0;		/* no preset if retriggering */
			}
			else
			{
				/*** Quantizations ****************************************/
				/* dlriklst_w	-100 ... 100 %	10 bit	q = 0.1953 %	  	*/
				/* dlrikl_w		-100 ... 100 %	10 Bit	q = 0.1953 %  	*/
				/* WDKREIB		   0 ... 1		 8 bit	q = 0.003906  	*/
				/**********************************************************/

        		if( dlriklst_w < 0)
        		{
          			temp_S16 = -dlriklst_w;
        		}
        		else
        		{
          			temp_S16 = dlriklst_w;
				}
        		dlrikl_w = (sint16)((uint32)temp_S16 * (uint32)KW_WDKREIB) >> 8;

        		if( ! GET_B_wdksauf )
        		{
          			dlrikl_w = -dlrikl_w;
     			}
      		}
    	}
	} /* end of initialization if small-I-quota */

	/* for data acquisition */
	dlriant_w = dlriant_l.wrd.h;

	/* preallocate I-Part for jump outside UMA-Band */
#if (SY_DVEKOOR == 1)
  	if( wdkbak_w <= KW_DLRUMABAND )
#else
  	if( wdkba_w <= KW_DLRUMABAND )
#endif
	{
		if( wdkdlr_w >= KW_DLRUMABAND )
		{
	  		if( dlriant_w < KW_DLRUMAIINI )
	  		{
	    		dlriant_l.wrd.h = KW_DLRUMAIINI;
	  		}
		}
	}

	/* precontrol of I-quota in default idle position */
	/* ... for closing direction */

	/**** Quantizations *******************************************/
	/* wdkdlr_w		0 ... 100 %		12 Bit		q=0.0244 % DK	*/
	/* wdknlp_w		0 ... 100 %		16 Bit		q=0.0015 % DK	*/
	/* wdkba_w	 -200 ... 200 %		14 Bit		q=0.0244 % DK	*/
	/* dlriant_l -100 ... 100 %		26 Bit		q=2.98e-6 % PWM */
	/* DLRNLPD		0 ... 100 %		16 Bit		q=0.0015 % DK	*/
	/**************************************************************/

	if( GET_B_dlrumzu )
	{
		if( wdkdlr_w < (Int16)(sub_U16U16_U16(wdknlp_w, KW_DLRNLPD) >> 4) )
	    {
	  	#if (SY_DVEKOOR == 1)
      		if( wdkbak_w >(Int16)(wdknlp_w >> 4) )
      		{
        		temp_S16 = wdkbak_w - (Int16)(wdknlp_w >> 4);
	  		}
	  		else
	  		{
	    		temp_S16 = (Int16)(wdknlp_w >> 4) - wdkbak_w;
  	  		}
	  	#else
      		if( wdkba_w > (Int16)(wdknlp_w >> 4) )
      		{
        		temp_S16 = wdkba_w - (Int16)(wdknlp_w >> 4);
	  		}
	  		else
	  		{
	    		temp_S16 = (Int16)(wdknlp_w >> 4) - wdkba_w;
  	  		}
	  	#endif

	  		if( temp_S16 > (Int16)(KW_DLRNLPD >> 4) )
		  	{
	    		dlriant_l.wrd.h -= (sint16)dlrini_w;
		  	}
	  		CLR_B_dlrumzu;
	    }
  	}
  	else
  	{
    	/* ... for opening direction */
    	if( wdkdlr_w > (Int16)(add_U16U16_U16(wdknlp_w, KW_DLRNLPD) >> 4) )
    	{
  		#if (SY_DVEKOOR == 1)
      		if( wdkbak_w > (Int16)(wdknlp_w >> 4) )
      		{
        		temp_S16 = wdkbak_w - (Int16)(wdknlp_w >> 4);
	  		}
	  		else
	  		{
	    		temp_S16 = (Int16)(wdknlp_w >> 4) - wdkbak_w;
  	  		}
  		#else
      		if( wdkba_w > (Int16)(wdknlp_w >> 4) )
      		{
        		temp_S16 = wdkba_w - (Int16)(wdknlp_w >> 4);
	  		}
			else
	  		{
	    		temp_S16 = (Int16)(wdknlp_w >> 4) - wdkba_w;
  	  		}
  		#endif

	  		if( temp_S16 > (Int16)(KW_DLRNLPD >> 4) )
	  		{
	    		dlriant_l.wrd.h += (Int16)dlrini_w;
  	  		}
			SET_B_dlrumzu;
    	}
  	}
	/* limitation ob dlriant_l */
	if( dlriant_l.wrd.h > IANT_MAX )
	{
		dlriant_l.wrd.h = IANT_MAX;		/* 100 % */
		dlriant_l.wrd.l = 0;
	}
	else
	{
		if( dlriant_l.wrd.h < IANT_MIN )
		{
			dlriant_l.wrd.h = IANT_MIN;		/* -100 % */
			dlriant_l.wrd.l = 0;
		}
	}
	/* while power stage is switched off, reset I-part */
	if( GET_B_dcdisfr )
	{
		dlriamax = 0;
		dlriklst_w = 0;
	}
	else
	{
		dlriamax = KW_DLRIAMAXA;
	}

	/********************************************************/
	/* 		end function: manipulation of I quota			*/
	/********************************************************/


	/********************************************************/
	/* 		function: Monitoring of PID range				*/
	/********************************************************/

  	if ((!(GET_B_wdksive || GET_B_dlrpide)|| GET_B_appnolu)
  	   && !GET_B_dkpiu && !GET_B_i_ska_um
       #if (SY_SGANZ > 1)
	   && !GET_B_dcdiscan
	   #endif
	   )
	{
		if( GET_B_ubdve && ! GET_B_dkaden && ! GET_B_pwrsv )
		{
	  		if( ( GET_B_dlrspi10 && (dlrspid10_w > KW_DLRPIDMAX) )
	  		|| ( ! GET_B_dlrspi10 && (dlrspid10_w > KW_DLRPIDMIN) )
	#if (SY_DVEAIF == 3)
			|| (GET_B_dklosb && !GET_B_wdksg)
	#endif
			)
      		{
        		dlrber_test();  /* out of signal range */
      		}
      		else
       		{
        		CLR_B_dlrbe;	/* clear reversible SKA */

				dlrpidc_w = sub_U16U16_U16(dlrpidc_w, KW_TDLRPIDC);	/* decrement error counter */
				if( dlrpidc_w > KW_DLRPID2T+1)
				{
		  			dlrpidc_w = KW_DLRPID2T + 1;
				}

        		dveesc = 0;		/* reset antibeat counter */
        		CLR_B_dveesh;
     			dlrpidrc_w = 0; 	/* zero ice break error counter */
			}
		}
		else
		{
	  		dlrpidc_w = sub_U16U16_U16(dlrpidc_w, KW_TDLRPIDC);	/* decrement error counter */
	  		if( dlrpidc_w > KW_DLRPID2T+1)
	  		{
	  			dlrpidc_w = KW_DLRPID2T + 1;
	  		}

			dveesc = 0;		/* reset antibeat counter */
			CLR_B_dveesh;
      		dlrpidrc_w = 0; 	/* zero ice break error counter */

			CLR_B_dvete; /* reset extended exchange detection */
		}
	}
	else
	{
		CLR_B_dlrbe;	/* clear reversible SKA */
	}

      /* flag suspect for exceed control setting range */
  	PUT_B_dlrbev (dlrpidc_w > KW_DLRPID3T);

	/* observation of control setting range */
  	if ((dlrpidrc_w == 0)
	#if (SY_DVEAIF == 3)
  		&& !GET_B_dkeis
	#endif
  		)
    {
      SET_B_wdksg;    /* set 'all seems well'-Signal */
    }
  	else
  	{
	  	if (dlrpidrc_w > KW_DLRPID3T)
		{
	      CLR_B_wdksg;    /* clear 'all seems well'-Signal */
		}
	}
	/********************************************************/
	/* 		end function: Monitoring of PID range			*/
	/********************************************************/

	/********************************************************/
	/* 		function: switch on coordination of powerstage 	*/
	/********************************************************/


	if (GET_B_dcdisr || ((GET_B_wdksive || GET_B_dlrpide ) && ! GET_B_appnolu) ||
		#if (SY_TWDKS > 0)
			(GET_B_dkpiu && !GET_B_lrnwt) ||
		#else
			GET_B_dkpiu ||
		#endif
			GET_B_i_ska_um ||
			GET_B_dveesh || ! GET_B_ubdve || GET_B_pwrsv
       	#if (SY_SGANZ > 1)
			|| GET_B_dcdiscan
		#endif
		)
  	{
    	SET_B_dcdisfr;
  	}
  	else
  	{
		CLR_B_dcdisfr;
  	}
}
#define STOP_SECTION_Task_r10ms
#include "pragma.h"
/************************************************************************/

/***********************************************************************/
/*	process: adve_20ms												   */
/*	purpose: 														   */
/***********************************************************************/
#define START_SECTION_Task_r20ms
#include "pragma.h"

void adve_20ms(void)
{
	uint16 temp_u16;
	sint16 gwdkdlr20_w;	/* Copy of gwdkdlr_w from 10 ms process */

#if (SY_UBR > 0)
	if( ! GET_B_nldve ) /* after-run but no further demand for ADVE */
	{
		return;					  /* then return */
	}
#endif

	gwdkdlr20_w = gwdkdlr_w;       /* local copy */

	/********************************************************/
	/* 		function: check of battery voltage 				*/
	/********************************************************/

#if (SY_UBR > 0)
	/********************************************************/
	/* 		function: check of ub			 				*/
	/********************************************************/
	if(GET_B_ubg)
	{
	    if ( GET_B_ubdve )
  	    {
  	  	    if ( ubrsq < SY_UBDEDIQ )	/* ub less than 7 V ? */
	  	    {
		  	    CLR_B_ubdve;
		  	    CLR_B_ubpvg;
	  	    }
  	    }
  	    else
  	    {
  	  	    if ( ubrsq > SY_UBDEENQ )	/* ub greater than  8 V ? */
	  	    {
		  	    SET_B_ubdve;
		  	    SET_B_ubpvg;
	  	    }
  	    }
	}
	else
	{
		CLR_B_ubdve;
		CLR_B_ubpvg;
	}

	/********************************************************/
	/* 		end function: check of ub		 				*/
	/********************************************************/

    /* === block check_of_battery_voltage === */

    if ( GET_B_ubdve
      #if (SY_ACCSSRY > 0)
        && !GET_B_nachl
      #else
  	    && GET_B_kl15
      #endif
        )
    {
        SET_B_ub_ok;
    }
    else
    {
        CLR_B_ub_ok;
    }

#else  /* (SY_UBR > 0) */

  /*** Battery voltage check BCHECK_1SG ***/
	if ( GET_B_ubdve )
  	{
    	if ( ubsq < SY_UBDEDIQ )	/* ub less than 7 V ? */
  		{
  	  		CLR_B_ubdve;
  	  		CLR_B_ubpvg;
  	  		CLR_B_ub_ok;		/* battery voltage is too low */
  		}
  	}
  	else
  	{
    	if ( ubsq > SY_UBDEENQ )	/* ub greater than  8 V ? */
  		{
  	  		SET_B_ubdve;
  	  		SET_B_ubpvg;
  	  		SET_B_ub_ok;		/* battery voltage is OK */
  		}
  	}

#endif	/* SY_UBR > 0*/

	/********************************************************/
	/* 		end function: check of battery voltage 			*/
	/********************************************************/

	/********************************************************/
	/* 		function: monitoring of position	 			*/
	/********************************************************/

	if ( !GET_B_dkpiu && !GET_B_i_ska_um && GET_B_ubdve
       #if (SY_SGANZ > 1)
	   && !GET_B_dcdiscan
	   #endif
	  )
	{
		if ( GET_B_dknolu && ! GET_B_appnolu )	/* observation of DK_NLP while driving in NLP */
		{

			if( !GET_B_lrnerf ||
  #if (SY_DVEKOOR == 1)
	    	( wdkbak_w > (Int16)add_U16U16_U16(wdknlp_w, KW_WDKNLPTOL) >> 4 )
  #else
	    	( wdkba_w  > (Int16)add_U16U16_U16(wdknlp_w, KW_WDKNLPTOL) >> 4 )
  #endif
  			)
    		{
      			SET_B_nlpne;		/* activate reversible SKA */
    		}
		    else
    		{
      			CLR_B_nlpne;	/* reversible SKA deactivate */
    		}
		}
		else	/* observation of DK-Soll- / Istwert */
		{

			CLR_B_nlpne;
		}
		if( !GET_B_wdksive && !GET_B_dlrpide && !GET_B_dkaden && !GET_B_pwrsv )
		{
				/* Quantization:												*/
				/* gwdkdlr_w    signed 16 bit  -50 ...49.9 %DK	q=0,001526 %DK	*/
				/* gwdk_kge		signed 15 bit    0 ...49.9 %DK	q=0,001526 %DK	*/
				/* dwdksimx	  unsigned  8 bit	 0 ... 100 %DK	q=0,392    %DK	*/
				/* wdksfi_w		signed 14 bit -200 ... 200 %DK	q=0,024414 %DK	*/
				/* wdkba_w	    signed 14 bit -200 ... 200 %DK	q=0,024414 %DK	*/
				/* DWDKSBAMX  unsigned 16 bit	 0 ... 100 %DK	q=0,001526 %DK	*/

	/********************************************************/
	/* 		function: dk angle deviation mx		 			*/
	/********************************************************/

			if( gwdkdlr20_w < 0)
			{
	  			if ( gwdkdlr20_w == MININT16)
	  			{
	    			gwdk_kge = MAXINT16;	/* 8000h --> 7FFFh */
	  			}
	  			else
	  			{
	    			gwdk_kge = (Word)-gwdkdlr20_w;/* gwdk_kge is input in KL DWDKSBAMX */
	  			}
			}
			else
			{
	  			gwdk_kge =  (Word)gwdkdlr20_w;
			}

			dwdksimx = (uint8)(KL_DWDKSBAMX >> 8);	/* use high byte */

	#if (SY_DVEAIF > 0)
			if( !GET_B_stend && (nmot < KW_DWDKNMOMIN) && ((tmot < KW_DWDKTMIN) || (tans < KW_DWDKTMIN)))
			{
				dwdksimx = add_U8U8_U8( dwdksimx, KW_DWDKSTART);
			}
	#endif

		#if (SY_DVEKOOR == 1)
			if( wdksfi_w > wdkbak_w )
			{
	  			temp_u16 = (Word)(wdksfi_w - wdkbak_w);
			}
			else
			{
	  			temp_u16 = (Word)(wdkbak_w - wdksfi_w);
			}
		#else
			if( wdksfi_w > wdkba_w )
			{
	  			temp_u16 = (Word)(wdksfi_w - wdkba_w);
			}
			else
			{
	  			temp_u16 = (Word)(wdkba_w - wdksfi_w);
	  		}
		#endif

			if( (temp_u16 >> 4) > dwdksimx )
			{
				if( dklagerc > KW_DKLAGERT )
				{
				  	SET_B_wdksive;	/* set flag, for request notluftfahren */

				  #if (SY_CJ230 > 0)
				    dveestatm = dveestat;
				    if (dveestat>0)
				    {
				      	SET_B_dveese;	/* set DVE powerstage error */
					}
				  #else
				    if (!GET_B_dveeson)
				    {
				      	SET_B_dveese;	/* set DVE powerstage error */
					}
				  #endif
				}
				else
	  			{
	  				dklagerc++;			/* increment error counter */
	  			}
			}
			else
			{
				if( dklagerc > KW_TDKLAGDE)
				{
					dklagerc -= KW_TDKLAGDE;		/* reduce error counter */
				}
	  			else
	  			{
	    			dklagerc = 0;				/* limit error counter to zero */
	  			}
			}

				/* lowpass filter of DK-set value for prediction of DK-actual value */
				/* Result of filter is only in the next raster required */
				/* Quantization:										*/
				/* wdkdlr_w	  unsigned 12 bit	 0 ... 100 %DK  qa=0,024414 %DK */
				/* wdksfi_w		signed 14 bit -200 ... 200 %DK	qb=0,024414 %DK	*/
				/* ZKWDKSPT1  unsigned  8 bit    0 ... 0,7 		qz=0,002734 	*/
				/* correction factor cf for appropriate quantization:			*/
				/*	cf = 65536 * qz * 32768 / 781 = 7516  (CORR_WDKS = 7516)	*/
				/* WDKS_CONST = 65536 * qz * 32768 = 5872026					*/
				/*	cf = 65536 * qz = 179,2	  (CORR_WDKS = 179)					*/
				/* The result is then the high word of the lowpass filter.		*/

			wdkstp1_l.lng = tp1_S32( (uint16)ZKWDKSPT1 * CORR_WDKS, (sint16)wdkdlr_w,
				(sint16)wdkstp1_l.wrd.h, (uint16)wdkstp1_l.wrd.l);

			wdksfi_w = wdkstp1_l.wrd.h;		/* new filter value of wdksfi_w */
		}
	}
  	PUT_B_wdksivev(dklagerc > KW_DKLAGERTV);
	/********************************************************/
	/* 		end function: monitoring of position	 		*/
	/********************************************************/
}
#define STOP_SECTION_Task_r20ms
#include "pragma.h"

/***********************************************************************/
/*	process: adve_50ms												   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_r50ms
#include "pragma.h"

void adve_50ms(void)
{
	sint16 gwdkdlr50_w;

#if (SY_UBR > 0)
	if( ! GET_B_nldve )
	{
		return;
	}
#endif

	/********************************************************/
	/* 		function: reduction of I-quota static friction	*/
	/********************************************************/

	if( ! GET_B_dlrien )
	{
		gwdkdlr50_w = gwdkdlr_w;

		if( gwdkdlr50_w < 0)	/* set absolute value of gwdkdlr_w */
		{
			if ( gwdkdlr50_w == MININT16)
			{
				gwdkdlr50_w = MAXINT16;		/* 8000h --> 7FFFh */
			}
			else
			{
				gwdkdlr50_w = -gwdkdlr50_w;
			}
		}

		if( (dlriant_l.wrd.h < dlrhaftak) && (gwdkdlr50_w <= KW_DLRHAFTST) )
		{
		 	if ( dlrihaftc > KW_TDLRHAFTMX )
		 	{
		 		dlriant_l.wrd.h = dlrhaftak;
		 		dlrihaftc = 0;
		 	}
		 	else
		 	{
		 		dlrihaftc++;
		 	}
		}
		else
		{
			if (dlrihaftc > 0)
			{
				dlrihaftc--;
			}
		}
	}
}
#define STOP_SECTION_Task_r50ms
#include "pragma.h"

/***********************************************************************/
/*	process: adve_100ms												   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_r100ms
#include "pragma.h"

void adve_100ms(void)
{
	uint8 temp;

#if (SY_UBR > 0)
	if( ! GET_B_nldve )
	{
		return;
	}
#endif

	/********************************************************/
	/* 		function: compensation battery voltage			*/
	/********************************************************/

	/* Quantizstion ---------------------------------*/
	/* DLRUBSOLL	0 ... 25.5 V	8 Bit	0.1 V 	 */
	/* ubsq			0 ... 25.5 V	8 Bit	0.1 V 	 */
	/* dlrbatkp_w	0 ... 2		   16 Bit  30.52e-6  */
	/* ZKUBDLR		0 ... 0.5		8 Bit	0.00195	 */
	/* DLRKREIS		0 ... 2			8 Bit	0.00781	 */
	/* DLRKREISST	0 ... 2			8 Bit	0.00781	 */
	/* dlrkomp		0 ... 2			8 Bit	0.00781	 */
	/* ubrsq		0 ... 25.5 V	8 Bit	0.1 V	 */
	/* temp			0 ... 2			8 Bit	0.00781  */
	/* CORR_UB	128									 */
	/*-----------------------------------------------*/

#if (SY_UBR > 0)
	if( ubrsq <= (KW_DLRUBSOLL >> 1) )	 /* limitation of temp to max. range (2)*/
	{
		temp = REL_2;
	}
	else
	{
		temp = (uint8) ((uint16) KW_DLRUBSOLL * CORR_UB / ubrsq);
	}

#else

	if( ubsq <= (KW_DLRUBSOLL >> 1) )
	{
		temp = REL_2;		/* limitation to 2 */
	}
	else
	{
		temp = (uint8) ((uint16) KW_DLRUBSOLL * CORR_UB / ubsq);
	}
#endif
	dlrbatkp_w = tp1_U16( (uint16)KW_ZKUBDLR * CORR_UB, temp, dlrbatkp_w);

	if( GET_B_st && GET_B_nmot )
	{
		dlrkomp = (uint8)(((uint32)KW_DLRKREISST * (uint32)dlrbatkp_w) >> 15);
	}
	else
	{
		dlrkomp = (uint8)(((uint32)KW_DLRKREIS * (uint32)dlrbatkp_w) >> 15);
	}
}
#define STOP_SECTION_Task_r100ms
#include "pragma.h"

/***********************************************************************/
/*	process: adve_1s												   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_r1000ms
#include "pragma.h"

void adve_1s(void)
{

	/************************************************************************/
	/* adve_1s:																*/
	/* On request of KW_CWDKNOLU the bit B_appnolu will be triggert. Only 	*/
	/* after the transition KW_CWDKNOLU 1 --> 0 --> 1 B_appnolu can be		*/
	/* retriggert.	 														*/
	/* B_appnolu activates in SREAKT 'limp home' function; but the 			*/
	/* setvalue of throttle blade can be set with position control.			*/
	/************************************************************************/

	/* DON'T USE adve_1s() in run after !!!!!! */

	if( ! GET_B_kl15 )	/* switch off adve_1s in run after */
	{
		return;
	}

#if (SY_UBR > 0)
	SET_B_nldve;	/* refresh and prepare for usage in run-after in other processes */
#endif

	SET_B_nldve1;

	/********************************************************/
	/* 		function: application of limphome position		*/
	/********************************************************/

	if( (KW_CWDKNOLU > 0) && (nmot > 0) )
	{
		if( ! GET_B_apnoluv )
		{
			SET_B_appnolu;
			SET_B_apnoluv;
		}
	}
	else
	{
		CLR_B_appnolu;
		CLR_B_apnoluv;
	}
}
#define STOP_SECTION_Task_r1000ms
#include "pragma.h"

/************************************************************************
process: adve_1msSwOff
************************************************************************/
#define START_SECTION_Task_r1msSwOff
#include "pragma.h"
void adve_1msSwOff(void)
{
	adve_1ms();
}
#define STOP_SECTION_Task_r1msSwOff
#include "pragma.h"

/************************************************************************
process: adve_10msSwOff
************************************************************************/
#define START_SECTION_Task_r10msSwOff
#include "pragma.h"
void adve_10msSwOff(void)
{
	adve_10ms();
}
#define STOP_SECTION_Task_r10msSwOff
#include "pragma.h"

/************************************************************************
process: adve_20msSwOff
************************************************************************/
#define START_SECTION_Task_r20msSwOff
#include "pragma.h"
void adve_20msSwOff(void)
{
	adve_20ms();
}
#define STOP_SECTION_Task_r20msSwOff
#include "pragma.h"

/************************************************************************
process: adve_50msSwOff
************************************************************************/
#define START_SECTION_Task_r50msSwOff
#include "pragma.h"
void adve_50msSwOff(void)
{
	adve_50ms();
}
#define STOP_SECTION_Task_r50msSwOff
#include "pragma.h"

/************************************************************************
process: adve_100msSwOff
Disable power stage for DVE: P_DVE = TRUE and value for DVE PWM-Channel
dlrspid_w = 0;
Refresh of PWM-Channel every 100 ms.
************************************************************************/
#define START_SECTION_Task_r100msSwOff
#include "pragma.h"
void adve_100msSwOff(void)
{
#if (SY_UBR > 0)
	if( twdknlc > KW_TWDKNL )
	{
#endif

		SET_B_dcdisfr;		/* disable power stage during after run */
		dlrspid_w = 0;			/* PWM = 0 % */
		CLR_B_dlrspid;

#if (SY_UBR > 0)
		CLR_B_nldve;
#endif
		CLR_B_nldve1;

	/* PWMNegative

		Vorbereitung PWM-Ausgabe
		Quantisierung
		PWM-Kanal:		q= 50 ns	bei fcpu=20 MHz
		Periodendauer:	t= 0.5 ms	(f=2 kHz)
						PP2I = 9999
		dlrspid_w:		0 ... 65535
						0 ... 100 %		*/

	/* Output of PWM-signal is moved to HT2KTDVE */

#if (SY_UBR > 0)
	}
	else
	{
		if( GET_B_nmin )
		{
			if( twdknlc < MAXBYTE )
			{
				twdknlc++;
			}
		}
	}
#endif

	adve_100ms();

}	/* end adve_100msSwOff */
#define STOP_SECTION_Task_r100msSwOff
#include "pragma.h"

/***********************************************************************/
/*	process: adve_fcmclr											   */
/*	purpose: 														   */
/***********************************************************************/

#define START_SECTION_Task_rfcmclr
#include "pragma.h"

void adve_fcmclr(void)
{
#if (SY_BLOOP > 0)
	if (getClf(DFP_DVEL) )
	{
	  	CLR_B_wdksive;
	  	CLR_B_wdksivev;
		dklagerc = 0;
	}

	if (getClf(DFP_DVEE) )
	{
		CLR_B_dveese;
		dveesc = 0;
	}

	if (getClf(DFP_DVER) )
	{
		CLR_B_dlrpide;
		CLR_B_dlrbe;
	  	CLR_B_dlrbev;
	  	dlrpidc_w = 0;
	  	dlrpidrc_w = 0;
	}
#endif
}	/* end fcmclr */
#define STOP_SECTION_Task_rfcmclr
#include "pragma.h"
/************************************************************************/
Last edited by 960 on Sun Apr 28, 2019 4:26 pm, edited 1 time in total.

960
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Re: electronic throttle body control ETB

Post by 960 » Sun Apr 28, 2019 4:05 pm

These are the variable constants that can be changed in flash for ADVE:

Code: Select all

Address;Name;Id;Size
"$14484";"Schwelle Aktivierung D-Anteil (Geschwindigkeit) im unverstärkten Bereich";"DANTGESWNV";"1x1"
"$14486";"Schwelle Aktivierung D-Anteil (Geschwindigkeit) im verstärkten Bereich";"DANTGESWV";"1x1"
"$14488";"Schwelle Aktivierung D-Anteil (Abweichung) im unverstärkten Bereich";"DANTSCHWNV";"1x1"
"$1448A";"Schwelle Aktivierung D-Anteil (Abweichung) im verstärkten Bereich";"DANTSCHWV";"1x1"
"$10B34";"zulässige Fehlerzeit für DK-Soll-/Istvergleich";"DKLAGERT";"1x1"
"$1448C";"DLR, obere Grenze zur Parameterumschaltung";"DLRDWDKSS1";"1x1"
"$1448E";"DLR, untere Grenze zur Parameterumschaltung";"DLRDWDKSS2";"1x1"
"$1B79E";"min. notwendiger I-Anteil im Haftreibunsfall";"DLRHAFTMN";"1x1"
"$1B7A0";"max. Sollwertgradient zur Aktivierung der Haftreibunsroutine";"DLRHAFTST";"1x1"
"$14490";"maximal zulässiger I-Anteil";"DLRIAMAXA";"1x1"
"$10B35";"DLR, I-Klein Parameter";"DLRIKLPAR";"1x1"
"$14492";"I-Anteil bei Inititialisierung der NLP-Funktion";"DLRININI";"1x1"
"$10B36";"DLR, D-Parameter über NLP";"DLRKDONLP0";"1x1"
"$10B37";"DLR, D-Parameter unter NLP (schwach)";"DLRKDUNLP0";"1x1"
"$10B38";"DLR, D-Parameter unter NLP (mittel)";"DLRKDUNLP1";"1x1"
"$10B39";"DLR, D-Parameter unter NLP (stark)";"DLRKDUNLP2";"1x1"
"$10B3A";"DLR, D-Parameter unter NLP (unverstärktes Poti)";"DLRKDUNLP3";"1x1"
"$10BDB";"DLR, P-Parameter über NLP";"DLRKPONLP0";"1x1"
"$10BDC";"DLR, P-Parameter unter NLP (schwach)";"DLRKPUNLP0";"1x1"
"$10BDD";"DLR, P-Parameter unter NLP (mittel)";"DLRKPUNLP1";"1x1"
"$10BDE";"DLR, P-Parameter unter NLP (stark)";"DLRKPUNLP2";"1x1"
"$10BDF";"DLR, P-Parameter unter NLP (unverstärktes Poti)";"DLRKPUNLP3";"1x1"
"$18882";"DLR, Faktor Kreisverstärkung";"DLRKREIS";"1x1"
"$18883";"DLR, Faktor Kreisverstärkung zur Zeit des Motorstarts";"DLRKREISST";"1x1"
"$14494";"Unschärfebereich für DK-Notluftposition";"DLRNLPD";"1x1"
"$14496";"Fehlerzeit für DLR-Stellbereich im Anschlag zur erweiterten Stellertauscherkenng";"DLRPID0T";"1x1"
"$14498";"zulässige Fehlerzeit 1 für DLR-Stellbereich am Anschlag";"DLRPID1T";"1x1"
"$1449A";"zulässige Fehlerzeit 2 für DLR-Stellbereich am Anschlag";"DLRPID2T";"1x1"
"$1449C";"max. zulässiges PWM-Tastverhältnis für DLR";"DLRPIDMAX";"1x1"
"$1449E";"min. zulässiges PWM-Tastverhältnis für DLR";"DLRPIDMIN";"1x1"
"$18884";"DLR, Batterie Normalspannung";"DLRUBSOLL";"1x1"
"$144A0";"Unsicherheitsband bei Sprung aus UMA-Bereich";"DLRUMABAND";"1x1"
"$144A2";"Vorladewert I-Anteil bei Sprung aus UMA-Bereich";"DLRUMAIINI";"1x1"
"$10BE0";"Zeit für Heilungsversuch der DV-E-Endstufe";"DVEEST";"1x1"
"$144B0";"max. Soll-/Ist-DK-Winkel-Abweichung als f(dwdks)";"DWDKSBAMX";"5x1"
"$144BA";"Schwelle zur Aktivierung des I-Kleinanteils";"DWDKSIKLS";"1x1"
"$18885";"Identifizierung des DLR-Parametersatzes zu DV-E-Typ";"KDLRIDDVE";"1x1"
"$10BE1";"Zeitdelta für Fehlerzählerlöschung bei DK-Soll-/Istvergleich";"TDKLAGDE";"1x1"
"$18886";"Verweildauer für Aktivierung der Haftreibungsroutine";"TDLRHAFTMX";"1x1"
"$144BC";"Zeitdelta zur Fehlerzeitdecrementierung bei DLR-Stellbereichsüberwachung";"TDLRPIDC";"1x1"
"$144BE";"Wartezeit bis DV-E Powersave aktiv wird";"TPWRSV";"1x1"
"$18887";"Zeit nach nmot = 0 und Kl.15 AUS bis Nachlauf gestartet wird";"TWDKNL";"1x1"
"$144C0";"zulässige Potispannungs-Toleranz des NLP";"UDKNLPTOL";"1x1"
"$144C2";"Schwelle zur DK-Bewegungserkennung (I-Klein)";"WDKBEWS";"1x1"
"$144C4";"zulässige DK-Winkel-Toleranz des NLP";"WDKNLPTOL";"1x1"
"$10BE2";"Haftreibungsanteil der DK für I-Klein";"WDKREIB";"1x1"
"$144C6";"DK-Sollwert bei Applikationshilfe DK-Notluftfahren";"WDKSAPNOL";"1x1"
"$144C8";"Schwelle zur Stationaritätserkennung (verstärkter Bereich)";"WDKSTFEIN";"1x1"
"$144CA";"Schwelle zur Stationaritätserkennung (unverstärkter Bereich)";"WDKSTGROB";"1x1"
"$18888";"DLR, Zeitkonstante für Filterung von Ubatt";"ZKUBDLR";"1x1"
"$10BE3";"Zeitkonstante für Prädiktion DK-Winkel aus Sollwert";"ZKWDKSPT1";"1x1"

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Re: electronic throttle body control ETB

Post by OrchardPerformance » Sun Apr 28, 2019 4:20 pm

Is there a TLDR version of that? :lol:

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Re: electronic throttle body control ETB

Post by 960 » Sun Apr 28, 2019 4:21 pm

OrchardPerformance wrote:
Sun Apr 28, 2019 4:20 pm
Is there a TLDR version of that? :lol:
TLDR?

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Re: electronic throttle body control ETB

Post by OrchardPerformance » Sun Apr 28, 2019 4:26 pm

Too long - didn't read :lol:

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Re: electronic throttle body control ETB

Post by 960 » Tue Apr 30, 2019 10:02 am

The biggest issue seems to be within the first percents of Throttle opening.

It looks ok when testing, starting the engine changes that.

It's to slow and/or "nervous" around idle if that make any sense.

Maybe that could be solved by a target table like Link, or another table to make it nonlinear.



I "solved" the outcome from some of the functions yesterday, and got some of the scenario values:

dlrp = KW_DLRKPONLP0(30%PWM%TPS);
dlrd = KW_DLRKDONLP0(548%PWM%TPS);
dlri = KWB_DLRKIONLP0(32x1 table); 1,875% up to 4% TPS then 0,6250

dlrp = KW_DLRKPONLP1(60%PWM%TPS);
dlrd = KW_DLRKDONLP1(500%PWM%TPS);
dlri = KWB_DLRKIONLP1(32x1 table); 1,875% up to 4% TPS then 0,6250

dlrp = KW_DLRKPONLP2(60%PWM%TPS);
dlrd = KW_DLRKDONLP2(500%PWM%TPS);
dlri = KWB_DLRKIONLP2(32x1 table); 1,875% up to 4% TPS then 0,6250


I MAX 74,951


Does a higher I below 4% make sense?

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Re: electronic throttle body control ETB

Post by russian » Tue Apr 30, 2019 1:29 pm

960 wrote:
Tue Apr 30, 2019 10:02 am
The biggest issue seems to be within the first percents of Throttle opening.

It looks ok when testing, starting the engine changes that.

It's to slow and/or "nervous" around idle if that make any sense.
We _REALLY_ need your logs. We _REALLY_ need your magic number test result.

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Re: electronic throttle body control ETB

Post by OrchardPerformance » Tue Apr 30, 2019 2:51 pm

I suspect that is due to an increase in friction around the closed region.

With a greater DeltaP across the throttle there will be a larger side load on the spindle, most are still plain bearings so the loading ups the friction.

Have you tried increasing the compensation for the friction inline with the MAP value?

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Re: electronic throttle body control ETB

Post by russian » Wed May 01, 2019 2:10 am



TL;DR: Very not linear around zero
-5%
0%
15%

gives more or less same default position

And the jump between 15% to 19% would open throttle completely!

And if we go -20% to fully close it - sometimes returning to 0% duty would not open throttle, there is so much friction (?) that the spring would not return throttle back to default position unless we give it a 10% duty cycle kick.

Log attached - here is a screenshot.
Attachments
javaw_1G74OLgitq.png
javaw_1G74OLgitq.png (161.47 KiB) Viewed 544 times
2019-04-30_21_48_11 etb.msl
(932.29 KiB) Downloaded 97 times
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Re: electronic throttle body control ETB

Post by puff » Wed May 01, 2019 9:21 am

some clarification needed. what sort of etb is that?
do the spring-loaded electronic throttles need the same H-bridge? or a single PWM is sufficient?

what do the negative values mean in terms of electrical signal? since at 0% it doesn't produce any noise, it looks as if at 0% it turns off the signal.

it seemed to me that the spring-loaded ETB I once had didn't imply reverse polarity, since there was no room to close it any more - the spring did it all the way to the min.

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Re: electronic throttle body control ETB

Post by 960 » Wed May 01, 2019 4:16 pm

russian wrote:
Wed May 01, 2019 2:10 am

TL;DR: Very not linear around zero
-5%
0%
15%

gives more or less same default position

And the jump between 15% to 19% would open throttle completely!

And if we go -20% to fully close it - sometimes returning to 0% duty would not open throttle, there is so much friction (?) that the spring would not return throttle back to default position unless we give it a 10% duty cycle kick.
This shows exactly the kind of issues I had.

Thats why I wanted to automatic set the bias curve.

Ideally with points for every TPS% from 0 - 30%

I also had a lot of strange behaveor around 0, but not every time.

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Re: electronic throttle body control ETB

Post by russian » Thu May 02, 2019 3:20 am

Not much oscillation, but also slow response? Is that what we would call this log?

Magic Result = 263
Attachments
log_263.png
log_263.png (207.19 KiB) Viewed 502 times
tune_263.png
tune_263.png (491.77 KiB) Viewed 502 times
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Re: electronic throttle body control ETB

Post by russian » Thu May 02, 2019 4:35 am

Larger P, kind of not very scientific I & D. WAY better results! Magic Result = 58
Attachments
log_58.png
log_58.png (156.41 KiB) Viewed 499 times
tune_58.png
tune_58.png (326.91 KiB) Viewed 499 times
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Re: electronic throttle body control ETB

Post by 960 » Thu May 02, 2019 2:11 pm

How do you get that few decimals at the pid settings?

And so high numbers at the pid, have you changed some factors?

I have so many that I cannot see the first numbers in the fields :-(

And why do you suddenly have that high numbers in the bias curve again?
Last edited by 960 on Thu May 02, 2019 2:16 pm, edited 1 time in total.

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Re: electronic throttle body control ETB

Post by russian » Thu May 02, 2019 2:14 pm

960 wrote:
Thu May 02, 2019 2:11 pm
How do you get that few decimals at the pid settings?

I have so many that I cannot see the first numbers in the fields :-(
I use the keyboard to remove zeros. This would not stay if you close the dialog, I know it's annoying - but it works while you are on the dialog.
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Re: electronic throttle body control ETB

Post by puff » Thu May 02, 2019 2:28 pm

I can't find it. Do you use CS pin (to control current consumption)? How many control pins are needed from the discovery side? What are those pins?

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Re: electronic throttle body control ETB

Post by russian » Thu May 02, 2019 3:25 pm

puff wrote:
Thu May 02, 2019 2:28 pm
I can't find it. Do you use CS pin (to control current consumption)? How many control pins are needed from the discovery side? What are those pins?
You cannot find WHAT? Menus are at the bottom of left "general" section in TS.
CS pin of WHAT?

At the moment three stm32 pins are used to control VNH2SP30 - two direction and duty cycle. Negative duty cycle actually means "closing" direction while positive means "opening".
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Re: electronic throttle body control ETB

Post by puff » Thu May 02, 2019 4:40 pm

thx!
so, enA & enB pins pulled up in hardware?
cs = current sense pin on that board - could be handy to detect hard limits or blocked throttle.

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Re: electronic throttle body control ETB

Post by 960 » Thu May 02, 2019 8:05 pm

Are you getting same or different results with the 7209?

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