Manual:Hardware:PCB design rules

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  • As on Jan 2016 we are still migrating from KiCad version 2013-07-07 BZR 4022 to KiCad 4.0.1+ libraries etc. If it doesn't open well in 4.01, try BZR 4022.
  • Current versions of boards are published in individual subfolders of

Some latest modular boards now live at separate repositories like and

  • We are trying to reuse common libraries at - so, there could be relative path to libraries and make sure you've downloaded submodules.
  • Silk screen should include board revision space permitting.
  • Silk screen should include header information when possible, things like PA1, or PE4. Resistors and caps should be ref designators and a revision level. Of course a URL for more information and using the free bill boards is suggested.
  • Prefer 0805 packages over 0603 and 1206 packages. 0603 is small and kind of hard to handle, 1205 has about a 50% failure rate when thermally stressed over an industrial temperature range. 0805 is as large as you can go with out getting into potential thermal expansion issues.
  • We are targeting at DIY so BGA package is not an option.
  • 1oz copper suggested
  • Trace/via temperature rise should be 10C or less. That's based on UL 105C max while MFG's often allow up to 150C, and UL's 130C max solder joints. We are allowing for 95C board temps to dump to a +85C ambient. It is common a PCB has a rated temperature up to 125C, you need to check the substrate's datasheet. Look for peel strength, and Glass Transition (Tg) temperatures. When in doubt, typically 105C is a safe max temperature.
  • Suggested to use 12/12 traces and setback's such that low cost MFG houses can produce quality product. This can not always be followed, especially when you have a chip with 7 mil spacing, but if you try to follow this 12/12 rule, you'll get a higher yield from your PCB's. Even an 8/8 house can have issues as 8/8 is X/Y, a 45 degree angled traces would have a tolerance of √(8² + 8²)= 11.3, which rounds up to 12 mil. Most PCB layout programs will keep your angled setbacks at 8 mill instead of 12 mil. So you should set your setbacks to 12 to prevent MFG issues.
  • Test points are suggest as a way to diagnose various potential issues.
  • Any signal of about 1kHz or higher, will have GND currents that try to follow the adjacent trace. Use this practice to follow current loops and to prevent signals from coupling.
  • GND plane should not have physical barriers, signals and chips should be routed accordingly such that they do not cross naturally. GND plane barriers are almost never needed unless you get into RF circuits with strip line requirements. Which is not very likely with an automotive PCB. See this Maxim tutorial archived copy here
  • Name caps with pF and uF, avoid nF. Also include leading 0's. Example, 0.1uf instead of 100nF or .1uF. Also 2.2uF instead of 2u2F. Also 2.2k instead of 2k2. Naming conventions are important as scripts need this kind of consistency.
  • Ideally components available at both and should be used
  • Via sizing for via's to contain a wire, if solid should 10% larger than the diameter. As well stranded wire takes a larger diameter than solid. Use the below chart to approximate the stranded diameter, then add at least 10%. For example 20AWG wire, per that chart has a max diameter of 0.037in, 10% is 0.0037, and via plating is about 0.001, which means we need a min via drill diameter of 0.037in + 0.0037 + 0.001 + 0.001 = 0.0427 in diameter.
  • High speed stuff like USB should follow Intel's recommendations found in hs_usb_pdg_r1_0.pdf also this guide for the power signals