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port_mpu_util.h
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1/**
2 * @file port_mpu_util.h
3 *
4 * @date Jul 27, 2014
5 * @author Andrey Belomutskiy, (c) 2012-2020
6 * @author andreika <prometheus.pcb@gmail.com>
7 */
8
9#pragma once
10
11#define PORT_SIZE 16
12
13// todo: stm32 ticks are based on 4MHz timer I wonder if these STM32_SYSCLK-based clocks are broken here?!
14#define US_TO_NT_MULTIPLIER (STM32_SYSCLK / 1000000)
15
16// Scheduler queue GPT device
17#define GPTDEVICE GPTD1
18
25
26// we are lucky - all CAN pins use the same AF
27#define EFI_CAN_RX_AF 9
28#define EFI_CAN_TX_AF 9
29
30#ifndef ADC_TwoSamplingDelay_5Cycles
31#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
32#endif
33
34#ifndef ADC_TwoSamplingDelay_20Cycles
35#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
36#endif
37
38#ifndef ADC_CR2_SWSTART
39#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
40#endif
41
42#define SPI_CR1_8BIT_MODE 0
43#define SPI_CR2_8BIT_MODE 0
44
45#define SPI_CR1_16BIT_MODE SPI_CR1_DFF
46#define SPI_CR2_16BIT_MODE 0
47
48// TODO
49#define SPI_CR1_24BIT_MODE 0
50#define SPI_CR2_24BIT_MODE 0
51
52#define ADC_MAX_VALUE 4095
BOR_Level_t
@ BOR_Level_None
@ BOR_Level_1
@ BOR_Level_3
@ BOR_Level_2