Data Structures
struct	_port_digital_filter_config
	PORT digital filter feature configuration definition. More...

struct	_port_pin_config
	PORT pin configuration structure. More...

Variables
uint32_t	_port_digital_filter_config::digitalFilterWidth

port_digital_filter_clock_source_t	_port_digital_filter_config::clockSource

uint16_t	_port_pin_config::pullSelect: 2

uint16_t	: 2

uint16_t	_port_pin_config::slewRate: 1

uint16_t	: 1

uint16_t	: 1

uint16_t	_port_pin_config::passiveFilterEnable: 1

uint16_t	: 1

uint16_t	_port_pin_config::openDrainEnable: 1

uint16_t	: 1

uint16_t	_port_pin_config::driveStrength: 1

uint16_t	: 1

uint16_t	: 1

uint16_t	_port_pin_config::mux: 3

uint16_t	: 4

uint16_t	: 3

uint16_t	: 7

uint16_t uint16_t	_port_pin_config::lockRegister: 1

uint16_t	: 1

Driver version
enum	_port_pull { kPORT_PullDisable = 0U , kPORT_PullDown = 2U , kPORT_PullUp = 3U }
	Internal resistor pull feature selection. More...

enum	_port_slew_rate { kPORT_FastSlewRate = 0U , kPORT_SlowSlewRate = 1U }
	Slew rate selection. More...

enum	_port_open_drain_enable { kPORT_OpenDrainDisable = 0U , kPORT_OpenDrainEnable = 1U }
	Open Drain feature enable/disable. More...

enum	_port_passive_filter_enable { kPORT_PassiveFilterDisable = 0U , kPORT_PassiveFilterEnable = 1U }
	Passive filter feature enable/disable. More...

enum	_port_drive_strength { kPORT_LowDriveStrength = 0U , kPORT_HighDriveStrength = 1U }
	Configures the drive strength. More...

enum	_port_lock_register { kPORT_UnlockRegister = 0U , kPORT_LockRegister = 1U }
	Unlock/lock the pin control register field[15:0]. More...

enum	_port_mux { kPORT_PinDisabledOrAnalog = 0U , kPORT_MuxAsGpio = 1U , kPORT_MuxAlt2 = 2U , kPORT_MuxAlt3 = 3U , kPORT_MuxAlt4 = 4U , kPORT_MuxAlt5 = 5U , kPORT_MuxAlt6 = 6U , kPORT_MuxAlt7 = 7U , kPORT_MuxAlt8 = 8U , kPORT_MuxAlt9 = 9U , kPORT_MuxAlt10 = 10U , kPORT_MuxAlt11 = 11U , kPORT_MuxAlt12 = 12U , kPORT_MuxAlt13 = 13U , kPORT_MuxAlt14 = 14U , kPORT_MuxAlt15 = 15U }
	Pin mux selection. More...

enum	_port_interrupt { kPORT_InterruptOrDMADisabled = 0x0U , kPORT_DMARisingEdge = 0x1U , kPORT_DMAFallingEdge = 0x2U , kPORT_DMAEitherEdge = 0x3U , kPORT_FlagRisingEdge = 0x05U , kPORT_FlagFallingEdge = 0x06U , kPORT_FlagEitherEdge = 0x07U , kPORT_InterruptLogicZero = 0x8U , kPORT_InterruptRisingEdge = 0x9U , kPORT_InterruptFallingEdge = 0xAU , kPORT_InterruptEitherEdge = 0xBU , kPORT_InterruptLogicOne = 0xCU , kPORT_ActiveHighTriggerOutputEnable = 0xDU , kPORT_ActiveLowTriggerOutputEnable = 0xEU }
	Configures the interrupt generation condition. More...

enum	_port_digital_filter_clock_source { kPORT_BusClock = 0U , kPORT_LpoClock = 1U }
	Digital filter clock source selection. More...

typedef enum _port_mux	port_mux_t
	Pin mux selection.

typedef enum _port_interrupt	port_interrupt_t
	Configures the interrupt generation condition.

typedef enum _port_digital_filter_clock_source	port_digital_filter_clock_source_t
	Digital filter clock source selection.

typedef struct _port_digital_filter_config	port_digital_filter_config_t
	PORT digital filter feature configuration definition.

typedef struct _port_pin_config	port_pin_config_t
	PORT pin configuration structure.

Configuration
static void	PORT_SetPinConfig (PORT_Type base, uint32_t pin, const port_pin_config_t config)
	Sets the port PCR register.

static void	PORT_SetMultiplePinsConfig (PORT_Type base, uint32_t mask, const port_pin_config_t config)
	Sets the port PCR register for multiple pins.

static void	PORT_SetMultipleInterruptPinsConfig (PORT_Type *base, uint32_t mask, port_interrupt_t config)
	Sets the port interrupt configuration in PCR register for multiple pins.

static void	PORT_SetPinMux (PORT_Type *base, uint32_t pin, port_mux_t mux)
	Configures the pin muxing.

static void	PORT_EnablePinsDigitalFilter (PORT_Type *base, uint32_t mask, bool enable)
	Enables the digital filter in one port, each bit of the 32-bit register represents one pin.

static void	PORT_SetDigitalFilterConfig (PORT_Type base, const port_digital_filter_config_t config)
	Sets the digital filter in one port, each bit of the 32-bit register represents one pin.

Interrupt
static void	PORT_SetPinInterruptConfig (PORT_Type *base, uint32_t pin, port_interrupt_t config)
	Configures the port pin interrupt/DMA request.

static void	PORT_SetPinDriveStrength (PORT_Type *base, uint32_t pin, uint8_t strength)
	Configures the port pin drive strength.

static uint32_t	PORT_GetPinsInterruptFlags (PORT_Type *base)
	Reads the whole port status flag.

static void	PORT_ClearPinsInterruptFlags (PORT_Type *base, uint32_t mask)
	Clears the multiple pin interrupt status flag.

Detailed Description

Typedef Documentation

◆ port_digital_filter_clock_source_t

typedef enum _port_digital_filter_clock_source port_digital_filter_clock_source_t

Digital filter clock source selection.

◆ port_digital_filter_config_t

typedef struct _port_digital_filter_config port_digital_filter_config_t

PORT digital filter feature configuration definition.

◆ port_interrupt_t

typedef enum _port_interrupt port_interrupt_t

Configures the interrupt generation condition.

◆ port_mux_t

typedef enum _port_mux port_mux_t

Pin mux selection.

◆ port_pin_config_t

typedef struct _port_pin_config port_pin_config_t

PORT pin configuration structure.

Enumeration Type Documentation

◆ _port_digital_filter_clock_source

enum _port_digital_filter_clock_source

Digital filter clock source selection.

Enumerator
kPORT_BusClock	Digital filters are clocked by the bus clock.
kPORT_LpoClock	Digital filters are clocked by the 1 kHz LPO clock.

Definition at line 140 of file fsl_port.h.

{
    kPORT_BusClock = 0U, /*!< Digital filters are clocked by the bus clock. */
    kPORT_LpoClock = 1U, /*!< Digital filters are clocked by the 1 kHz LPO clock. */
} port_digital_filter_clock_source_t;

◆ _port_drive_strength

enum _port_drive_strength

Configures the drive strength.

Enumerator
kPORT_LowDriveStrength	Low-drive strength is configured.
kPORT_HighDriveStrength	High-drive strength is configured.

Definition at line 72 of file fsl_port.h.

{
    kPORT_LowDriveStrength = 0U,  /*!< Low-drive strength is configured. */
    kPORT_HighDriveStrength = 1U, /*!< High-drive strength is configured. */
};

◆ _port_interrupt

enum _port_interrupt

Configures the interrupt generation condition.

Enumerator
kPORT_InterruptOrDMADisabled	Interrupt/DMA request is disabled.
kPORT_DMARisingEdge	DMA request on rising edge.
kPORT_DMAFallingEdge	DMA request on falling edge.
kPORT_DMAEitherEdge	DMA request on either edge.
kPORT_FlagRisingEdge	Flag sets on rising edge.
kPORT_FlagFallingEdge	Flag sets on falling edge.
kPORT_FlagEitherEdge	Flag sets on either edge.
kPORT_InterruptLogicZero	Interrupt when logic zero.
kPORT_InterruptRisingEdge	Interrupt on rising edge.
kPORT_InterruptFallingEdge	Interrupt on falling edge.
kPORT_InterruptEitherEdge	Interrupt on either edge.
kPORT_InterruptLogicOne	Interrupt when logic one.
kPORT_ActiveHighTriggerOutputEnable	Enable active high-trigger output.
kPORT_ActiveLowTriggerOutputEnable	Enable active low-trigger output.

Definition at line 113 of file fsl_port.h.

{
    kPORT_InterruptOrDMADisabled = 0x0U, /*!< Interrupt/DMA request is disabled. */
#if defined(FSL_FEATURE_PORT_HAS_DMA_REQUEST) && FSL_FEATURE_PORT_HAS_DMA_REQUEST
    kPORT_DMARisingEdge = 0x1U,  /*!< DMA request on rising edge. */
    kPORT_DMAFallingEdge = 0x2U, /*!< DMA request on falling edge. */
    kPORT_DMAEitherEdge = 0x3U,  /*!< DMA request on either edge. */
#endif
#if defined(FSL_FEATURE_PORT_HAS_IRQC_FLAG) && FSL_FEATURE_PORT_HAS_IRQC_FLAG
    kPORT_FlagRisingEdge = 0x05U,  /*!< Flag sets on rising edge. */
    kPORT_FlagFallingEdge = 0x06U, /*!< Flag sets on falling edge. */
    kPORT_FlagEitherEdge = 0x07U,  /*!< Flag sets on either edge. */
#endif
    kPORT_InterruptLogicZero = 0x8U,   /*!< Interrupt when logic zero. */
    kPORT_InterruptRisingEdge = 0x9U,  /*!< Interrupt on rising edge. */
    kPORT_InterruptFallingEdge = 0xAU, /*!< Interrupt on falling edge. */
    kPORT_InterruptEitherEdge = 0xBU,  /*!< Interrupt on either edge. */
    kPORT_InterruptLogicOne = 0xCU,    /*!< Interrupt when logic one. */
#if defined(FSL_FEATURE_PORT_HAS_IRQC_TRIGGER) && FSL_FEATURE_PORT_HAS_IRQC_TRIGGER
    kPORT_ActiveHighTriggerOutputEnable = 0xDU, /*!< Enable active high-trigger output. */
    kPORT_ActiveLowTriggerOutputEnable = 0xEU,  /*!< Enable active low-trigger output. */
#endif
} port_interrupt_t;

◆ _port_lock_register

enum _port_lock_register

Unlock/lock the pin control register field[15:0].

Enumerator
kPORT_UnlockRegister	Pin Control Register fields [15:0] are not locked.
kPORT_LockRegister	Pin Control Register fields [15:0] are locked.

Definition at line 81 of file fsl_port.h.

{
    kPORT_UnlockRegister = 0U, /*!< Pin Control Register fields [15:0] are not locked. */
    kPORT_LockRegister = 1U,   /*!< Pin Control Register fields [15:0] are locked. */
};

◆ _port_mux

enum _port_mux

Pin mux selection.

Enumerator
kPORT_PinDisabledOrAnalog	Corresponding pin is disabled, but is used as an analog pin.
kPORT_MuxAsGpio	Corresponding pin is configured as GPIO.
kPORT_MuxAlt2	Chip-specific
kPORT_MuxAlt3	Chip-specific
kPORT_MuxAlt4	Chip-specific
kPORT_MuxAlt5	Chip-specific
kPORT_MuxAlt6	Chip-specific
kPORT_MuxAlt7	Chip-specific
kPORT_MuxAlt8	Chip-specific
kPORT_MuxAlt9	Chip-specific
kPORT_MuxAlt10	Chip-specific
kPORT_MuxAlt11	Chip-specific
kPORT_MuxAlt12	Chip-specific
kPORT_MuxAlt13	Chip-specific
kPORT_MuxAlt14	Chip-specific
kPORT_MuxAlt15	Chip-specific

Definition at line 90 of file fsl_port.h.

{
    kPORT_PinDisabledOrAnalog = 0U, /*!< Corresponding pin is disabled, but is used as an analog pin. */
    kPORT_MuxAsGpio = 1U,           /*!< Corresponding pin is configured as GPIO. */
    kPORT_MuxAlt2 = 2U,             /*!< Chip-specific */
    kPORT_MuxAlt3 = 3U,             /*!< Chip-specific */
    kPORT_MuxAlt4 = 4U,             /*!< Chip-specific */
    kPORT_MuxAlt5 = 5U,             /*!< Chip-specific */
    kPORT_MuxAlt6 = 6U,             /*!< Chip-specific */
    kPORT_MuxAlt7 = 7U,             /*!< Chip-specific */
    kPORT_MuxAlt8 = 8U,             /*!< Chip-specific */
    kPORT_MuxAlt9 = 9U,             /*!< Chip-specific */
    kPORT_MuxAlt10 = 10U,           /*!< Chip-specific */
    kPORT_MuxAlt11 = 11U,           /*!< Chip-specific */
    kPORT_MuxAlt12 = 12U,           /*!< Chip-specific */
    kPORT_MuxAlt13 = 13U,           /*!< Chip-specific */
    kPORT_MuxAlt14 = 14U,           /*!< Chip-specific */
    kPORT_MuxAlt15 = 15U,           /*!< Chip-specific */
} port_mux_t;

◆ _port_open_drain_enable

enum _port_open_drain_enable

Open Drain feature enable/disable.

Enumerator
kPORT_OpenDrainDisable	Open drain output is disabled.
kPORT_OpenDrainEnable	Open drain output is enabled.

Definition at line 54 of file fsl_port.h.

{
    kPORT_OpenDrainDisable = 0U, /*!< Open drain output is disabled. */
    kPORT_OpenDrainEnable = 1U,  /*!< Open drain output is enabled. */
};

◆ _port_passive_filter_enable

enum _port_passive_filter_enable

Passive filter feature enable/disable.

Enumerator
kPORT_PassiveFilterDisable	Passive input filter is disabled.
kPORT_PassiveFilterEnable	Passive input filter is enabled.

Definition at line 63 of file fsl_port.h.

{
    kPORT_PassiveFilterDisable = 0U, /*!< Passive input filter is disabled. */
    kPORT_PassiveFilterEnable = 1U,  /*!< Passive input filter is enabled. */
};

◆ _port_pull

enum _port_pull

Internal resistor pull feature selection.

Enumerator
kPORT_PullDisable	Internal pull-up/down resistor is disabled.
kPORT_PullDown	Internal pull-down resistor is enabled.
kPORT_PullUp	Internal pull-up resistor is enabled.

Definition at line 35 of file fsl_port.h.

{
    kPORT_PullDisable = 0U, /*!< Internal pull-up/down resistor is disabled. */
    kPORT_PullDown = 2U,    /*!< Internal pull-down resistor is enabled. */
    kPORT_PullUp = 3U,      /*!< Internal pull-up resistor is enabled. */
};

◆ _port_slew_rate

enum _port_slew_rate

Slew rate selection.

Enumerator
kPORT_FastSlewRate	Fast slew rate is configured.
kPORT_SlowSlewRate	Slow slew rate is configured.

Definition at line 45 of file fsl_port.h.

{
    kPORT_FastSlewRate = 0U, /*!< Fast slew rate is configured. */
    kPORT_SlowSlewRate = 1U, /*!< Slow slew rate is configured. */
};

Function Documentation

◆ PORT_ClearPinsInterruptFlags()

static void PORT_ClearPinsInterruptFlags	(	PORT_Type *	base,
		uint32_t	mask
	)

inlinestatic

Clears the multiple pin interrupt status flag.

Parameters

base	PORT peripheral base pointer.
mask	PORT pin number macro.

Definition at line 462 of file fsl_port.h.

{
    base->ISFR = mask;
}

Referenced by _pal_lld_disablepadevent(), and _pal_lld_irq_handler().

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◆ PORT_EnablePinsDigitalFilter()

static void PORT_EnablePinsDigitalFilter	(	PORT_Type *	base,
		uint32_t	mask,
		bool	enable
	)

inlinestatic

Enables the digital filter in one port, each bit of the 32-bit register represents one pin.

Parameters

base	PORT peripheral base pointer.
mask	PORT pin number macro.

Definition at line 360 of file fsl_port.h.

{
    if (enable == true)
    {
        base->DFER |= mask;
    }
    else
    {
        base->DFER &= ~mask;
    }
}

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◆ PORT_GetPinsInterruptFlags()

static uint32_t PORT_GetPinsInterruptFlags ( PORT_Type * base )

inlinestatic

Reads the whole port status flag.

If a pin is configured to generate the DMA request, the corresponding flag is cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to that flag. If configured for a level sensitive interrupt that remains asserted, the flag is set again immediately.

Parameters

base	PORT peripheral base pointer.

Returns: Current port interrupt status flags, for example, 0x00010001 means the pin 0 and 16 have the interrupt.

Definition at line 451 of file fsl_port.h.

{
    return base->ISFR;
}

Referenced by _pal_lld_irq_handler().

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◆ PORT_SetDigitalFilterConfig()

static void PORT_SetDigitalFilterConfig	(	PORT_Type *	base,
		const port_digital_filter_config_t *	config
	)

inlinestatic

Sets the digital filter in one port, each bit of the 32-bit register represents one pin.

Parameters

base	PORT peripheral base pointer.
config	PORT digital filter configuration structure.

Definition at line 378 of file fsl_port.h.

{
    assert(config);
 
    base->DFCR = PORT_DFCR_CS(config->clockSource);
    base->DFWR = PORT_DFWR_FILT(config->digitalFilterWidth);
}

◆ PORT_SetMultipleInterruptPinsConfig()

static void PORT_SetMultipleInterruptPinsConfig	(	PORT_Type *	base,
		uint32_t	mask,
		port_interrupt_t	config
	)

inlinestatic

Sets the port interrupt configuration in PCR register for multiple pins.

Parameters

base	PORT peripheral base pointer.
mask	PORT pin number macro.
config	PORT pin interrupt configuration. kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled. kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit). kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit). kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit). kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit). kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit). kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit). kPORT_InterruptLogicZero : Interrupt when logic zero. kPORT_InterruptRisingEdge : Interrupt on rising edge. kPORT_InterruptFallingEdge: Interrupt on falling edge. kPORT_InterruptEitherEdge : Interrupt on either edge. kPORT_InterruptLogicOne : Interrupt when logic one. kPORT_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit). kPORT_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit)..

Definition at line 310 of file fsl_port.h.

{
    assert(config);
 
    if (mask & 0xffffU)
    {
        base->GICLR = (config << 16) | (mask & 0xffffU);
    }
    mask = mask >> 16;
    if (mask)
    {
        base->GICHR = (config << 16) | (mask & 0xffffU);
    }
}

◆ PORT_SetMultiplePinsConfig()

static void PORT_SetMultiplePinsConfig	(	PORT_Type *	base,
		uint32_t	mask,
		const port_pin_config_t *	config
	)

inlinestatic

Sets the port PCR register for multiple pins.

This is an example to define input pins or output pins PCR configuration.

// Define a digital input pin PCR configuration
port_pin_config_t config = {
     kPORT_PullUp ,
     kPORT_PullEnable,
     kPORT_FastSlewRate,
     kPORT_PassiveFilterDisable,
     kPORT_OpenDrainDisable,
     kPORT_LowDriveStrength,
     kPORT_MuxAsGpio,
     kPORT_UnlockRegister,
};

Parameters

base	PORT peripheral base pointer.
mask	PORT pin number macro.
config	PORT PCR register configuration structure.

Definition at line 272 of file fsl_port.h.

{
    assert(config);
 
    uint16_t pcrl = *((const uint16_t *)config);
 
    if (mask & 0xffffU)
    {
        base->GPCLR = ((mask & 0xffffU) << 16) | pcrl;
    }
    if (mask >> 16)
    {
        base->GPCHR = (mask & 0xffff0000U) | pcrl;
    }
}

◆ PORT_SetPinConfig()

static void PORT_SetPinConfig	(	PORT_Type *	base,
		uint32_t	pin,
		const port_pin_config_t *	config
	)

inlinestatic

Sets the port PCR register.

This is an example to define an input pin or output pin PCR configuration.

// Define a digital input pin PCR configuration
port_pin_config_t config = {
     kPORT_PullUp,
     kPORT_FastSlewRate,
     kPORT_PassiveFilterDisable,
     kPORT_OpenDrainDisable,
     kPORT_LowDriveStrength,
     kPORT_MuxAsGpio,
     kPORT_UnLockRegister,
};

Parameters

base	PORT peripheral base pointer.
pin	PORT pin number.
config	PORT PCR register configuration structure.

Definition at line 243 of file fsl_port.h.

{
    assert(config);
    uint32_t addr = (uint32_t)&base->PCR[pin];
    *(volatile uint16_t *)(addr) = *((const uint16_t *)config);
}

◆ PORT_SetPinDriveStrength()

static void PORT_SetPinDriveStrength	(	PORT_Type *	base,
		uint32_t	pin,
		uint8_t	strength
	)

inlinestatic

Configures the port pin drive strength.

Parameters

base	PORT peripheral base pointer.
pin	PORT pin number.
config	PORT pin drive strength kPORT_LowDriveStrength = 0U - Low-drive strength is configured. kPORT_HighDriveStrength = 1U - High-drive strength is configured.

Definition at line 431 of file fsl_port.h.

{
    base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_DSE_MASK) | PORT_PCR_DSE(strength);
}

Referenced by _pal_lld_setpadmode().

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◆ PORT_SetPinInterruptConfig()

static void PORT_SetPinInterruptConfig	(	PORT_Type *	base,
		uint32_t	pin,
		port_interrupt_t	config
	)

inlinestatic

Configures the port pin interrupt/DMA request.

Parameters

base	PORT peripheral base pointer.
pin	PORT pin number.
config	PORT pin interrupt configuration. kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled. kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit). kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit). kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit). kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit). kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit). kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit). kPORT_InterruptLogicZero : Interrupt when logic zero. kPORT_InterruptRisingEdge : Interrupt on rising edge. kPORT_InterruptFallingEdge: Interrupt on falling edge. kPORT_InterruptEitherEdge : Interrupt on either edge. kPORT_InterruptLogicOne : Interrupt when logic one. kPORT_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit). kPORT_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit).

Definition at line 415 of file fsl_port.h.

{
    base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | PORT_PCR_IRQC(config);
}

Referenced by _pal_lld_disablepadevent(), and _pal_lld_enablepadevent().

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◆ PORT_SetPinMux()

static void PORT_SetPinMux	(	PORT_Type *	base,
		uint32_t	pin,
		port_mux_t	mux
	)

inlinestatic

Configures the pin muxing.

Parameters

base	PORT peripheral base pointer.
pin	PORT pin number.
mux	pin muxing slot selection. kPORT_PinDisabledOrAnalog: Pin disabled or work in analog function. kPORT_MuxAsGpio : Set as GPIO. kPORT_MuxAlt2 : chip-specific. kPORT_MuxAlt3 : chip-specific. kPORT_MuxAlt4 : chip-specific. kPORT_MuxAlt5 : chip-specific. kPORT_MuxAlt6 : chip-specific. kPORT_MuxAlt7 : chip-specific. @Note : This function is NOT recommended to use together with the PORT_SetPinsConfig, because the PORT_SetPinsConfig need to configure the pin mux anyway (Otherwise the pin mux is reset to zero : kPORT_PinDisabledOrAnalog). This function is recommended to use to reset the pin mux

Definition at line 346 of file fsl_port.h.

{
    base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(mux);
}

Variable Documentation

◆ pad0

uint16_t _port_pin_config::__pad0__

Definition at line 161 of file fsl_port.h.

◆ pad10

uint16_t _port_pin_config::__pad10__

Definition at line 205 of file fsl_port.h.

◆ pad1

uint16_t _port_pin_config::__pad1__

Definition at line 167 of file fsl_port.h.

◆ pad2

uint16_t _port_pin_config::__pad2__

Definition at line 170 of file fsl_port.h.

◆ pad3

uint16_t _port_pin_config::__pad3__

Definition at line 175 of file fsl_port.h.

◆ pad4

uint16_t _port_pin_config::__pad4__

Definition at line 181 of file fsl_port.h.

◆ pad5

uint16_t _port_pin_config::__pad5__

Definition at line 187 of file fsl_port.h.

◆ pad6

uint16_t _port_pin_config::__pad6__

Definition at line 190 of file fsl_port.h.

◆ pad7

uint16_t _port_pin_config::__pad7__

Definition at line 194 of file fsl_port.h.

◆ pad8

uint16_t _port_pin_config::__pad8__

Definition at line 197 of file fsl_port.h.

◆ pad9

uint16_t _port_pin_config::__pad9__

Definition at line 199 of file fsl_port.h.

◆ clockSource

port_digital_filter_clock_source_t _port_digital_filter_config::clockSource

Set digital filter clockSource

Definition at line 150 of file fsl_port.h.

◆ digitalFilterWidth

uint32_t _port_digital_filter_config::digitalFilterWidth

Set digital filter width

Definition at line 149 of file fsl_port.h.

◆ driveStrength

uint16_t _port_pin_config::driveStrength

Fast/slow drive strength configure

Definition at line 185 of file fsl_port.h.

◆ lockRegister

uint16_t uint16_t _port_pin_config::lockRegister

Lock/unlock the PCR field[15:0]

Definition at line 203 of file fsl_port.h.

◆ mux

uint16_t _port_pin_config::mux

Pin mux Configure

Definition at line 193 of file fsl_port.h.

◆ openDrainEnable

uint16_t _port_pin_config::openDrainEnable

Open drain enable/disable

Definition at line 179 of file fsl_port.h.

◆ passiveFilterEnable

uint16_t _port_pin_config::passiveFilterEnable

Passive filter enable/disable

Definition at line 173 of file fsl_port.h.

◆ pullSelect

uint16_t _port_pin_config::pullSelect

No-pull/pull-down/pull-up select

Definition at line 159 of file fsl_port.h.

◆ slewRate

uint16_t _port_pin_config::slewRate

Fast/slow slew rate Configure

Definition at line 165 of file fsl_port.h.

Data Structures

Variables

Driver version

Configuration

Interrupt

Detailed Description

Typedef Documentation

◆ port_digital_filter_clock_source_t

◆ port_digital_filter_config_t

◆ port_interrupt_t

◆ port_mux_t

◆ port_pin_config_t

Enumeration Type Documentation

◆ _port_digital_filter_clock_source

◆ _port_drive_strength

◆ _port_interrupt

◆ _port_lock_register

◆ _port_mux

◆ _port_open_drain_enable

◆ _port_passive_filter_enable

◆ _port_pull

◆ _port_slew_rate

Function Documentation

◆ PORT_ClearPinsInterruptFlags()

◆ PORT_EnablePinsDigitalFilter()

◆ PORT_GetPinsInterruptFlags()

◆ PORT_SetDigitalFilterConfig()

◆ PORT_SetMultipleInterruptPinsConfig()

◆ PORT_SetMultiplePinsConfig()

◆ PORT_SetPinConfig()

◆ PORT_SetPinDriveStrength()

◆ PORT_SetPinInterruptConfig()

◆ PORT_SetPinMux()

Variable Documentation

◆ __pad0__

◆ __pad10__

◆ __pad1__

◆ __pad2__

◆ __pad3__

◆ __pad4__

◆ __pad5__

◆ __pad6__

◆ __pad7__

◆ __pad8__

◆ __pad9__

◆ clockSource

◆ digitalFilterWidth

◆ driveStrength

◆ lockRegister

◆ mux

◆ openDrainEnable

◆ passiveFilterEnable

◆ pullSelect

◆ slewRate

◆ pad0

◆ pad10

◆ pad1

◆ pad2

◆ pad3

◆ pad4

◆ pad5

◆ pad6

◆ pad7

◆ pad8

◆ pad9