21#if ENABLE_AUTO_DETECT_HSE
34 while ((TIMER->SR & TIM_SR_CC1IF) == 0);
45 uint32_t lastCapture = 0;
47 for (
size_t i = 0; i <
count; i++)
52 return lastCapture - firstCapture;
57static_assert(STM32_HSI_ENABLED);
58static_assert(STM32_HSE_ENABLED);
65 RCC->APB2ENR |= RCC_APB2ENR_TIM17EN;
69 RCC->APB2ENR &= RCC_APB2ENR_TIM17EN;
74 RCC->CFGR &= ~RCC_CFGR_SW;
77 RCC->CR &= ~(RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON);
80 auto pllm = roundedHseMhz / 2;
84 pllm << RCC_PLLCKSELR_DIVM1_Pos |
85 pllm << RCC_PLLCKSELR_DIVM2_Pos |
86 pllm << RCC_PLLCKSELR_DIVM3_Pos |
87 RCC_PLLCKSELR_PLLSRC_HSE;
90 RCC->CR |= RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON;
93 auto readyMask = RCC_CR_PLL1RDY | RCC_CR_PLL2RDY | RCC_CR_PLL3RDY;
94 while ((RCC->CR & readyMask) != readyMask) ;
97 RCC->CFGR |= RCC_CFGR_SW_PLL1;
105static_assert(STM32_SW == RCC_CFGR_SW_PLL);
109 RCC->APB2ENR |= RCC_APB2ENR_TIM11EN;
113 RCC->APB2ENR &= ~RCC_APB2ENR_TIM11EN;
119 RCC->CFGR &= ~RCC_CFGR_SW;
122 RCC->CR &= ~RCC_CR_PLLON;
125 RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLM_Msk | RCC_PLLCFGR_PLLSRC_Msk);
128 RCC->PLLCFGR |= (roundedHseMhz << RCC_PLLCFGR_PLLM_Pos) & RCC_PLLCFGR_PLLM_Msk;
130 RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
133 RCC->CR |= RCC_CR_PLLON;
134 while (!(RCC->CR & RCC_CR_PLLRDY));
137 RCC->CFGR &= ~RCC_CFGR_SW;
138 RCC->CFGR |= RCC_CFGR_SW_PLL;
139 while ((RCC->CFGR & RCC_CFGR_SWS) != (RCC_CFGR_SW_PLL << RCC_CFGR_SWS_Pos));
150 RCC->CFGR |= RCC_CFGR_RTCPRE_Msk;
158 TIMER->TISEL = TIM_TISEL_TI1SEL_1;
159#elif defined(STM32F4XX)
160 TIMER->OR = TIM_OR_TI1_RMP_1;
163 TIMER->OR = TIM11_OR_TI1_RMP_1;
167 TIMER->CCMR1 = TIM_CCMR1_CC1S_0;
168 TIMER->CCER = TIM_CCER_CC1E;
171 TIMER->CR1 |= TIM_CR1_CEN;
179 float hseFrequencyHz = 10 *
rtcpreDivider * STM32_TIMCLK2 / hseCounts;
static void reprogramPll(uint8_t roundedHseMhz)
static void enableTimer()
static const float rtcpreDivider
static uint32_t getOneCapture()
static uint32_t getTimerCounts(size_t count)
uint8_t autoDetectedRoundedMhz
static void disableTimer()