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rusefi_hw_stm32_enums.h
Go to the documentation of this file.
1
#pragma once
2
3
/**
4
* Hardware pin. This enum is platform-specific.
5
*/
6
enum class
Gpio
: uint16_t {
7
Unassigned
= 0,
8
// only used as return value of 'parseBrainPin' function do we really this this logic special value at all?!
9
Invalid
= 1,
10
11
A0
= 2,
12
A1
= 3,
13
A2
= 4,
14
A3
= 5,
15
A4
= 6,
16
A5
= 7,
17
A6
= 8,
18
A7
= 9,
19
A8
= 10,
20
A9
= 11,
21
A10
= 12,
22
A11
= 13,
23
A12
= 14,
24
A13
= 15,
25
A14
= 16,
26
A15
= 17,
27
28
B0
= 18,
29
B1
= 19,
30
B2
= 20,
31
B3
= 21,
32
B4
= 22,
33
B5
= 23,
34
B6
= 24,
35
B7
= 25,
36
B8
= 26,
37
B9
= 27,
38
B10
= 28,
39
B11
= 29,
40
B12
= 30,
41
B13
= 31,
42
B14
= 32,
43
B15
= 33,
44
45
C0
= 34,
46
C1
= 35,
47
C2
= 36,
48
C3
= 37,
49
C4
= 38,
50
C5
= 39,
51
C6
= 40,
52
C7
= 41,
53
C8
= 42,
54
C9
= 43,
55
C10
= 44,
56
C11
= 45,
57
C12
= 46,
58
C13
= 47,
59
C14
= 48,
60
C15
= 49,
61
62
D0
= 50,
63
D1
= 51,
64
D2
= 52,
65
D3
= 53,
66
D4
= 54,
67
D5
= 55,
68
D6
= 56,
69
D7
= 57,
70
D8
= 58,
71
D9
= 59,
72
D10
= 60,
73
D11
= 61,
74
D12
= 62,
75
D13
= 63,
76
D14
= 64,
77
D15
= 65,
78
79
E0
= 66,
80
E1
= 67,
81
E2
= 68,
82
E3
= 69,
83
E4
= 70,
84
E5
= 71,
85
E6
= 72,
86
E7
= 73,
87
E8
= 74,
88
E9
= 75,
89
E10
= 76,
90
E11
= 77,
91
E12
= 78,
92
E13
= 79,
93
E14
= 80,
94
E15
= 81,
95
96
F0
= 82,
97
F1
= 83,
98
F2
= 84,
99
F3
= 85,
100
F4
= 86,
101
F5
= 87,
102
F6
= 88,
103
F7
= 89,
104
F8
= 90,
105
F9
= 91,
106
F10
= 92,
107
F11
= 93,
108
F12
= 94,
109
F13
= 95,
110
F14
= 96,
111
F15
= 97,
112
113
G0
= 98,
114
G1
= 99,
115
G2
= 100,
116
G3
= 101,
117
G4
= 102,
118
G5
= 103,
119
G6
= 104,
120
G7
= 105,
121
G8
= 106,
122
G9
= 107,
123
G10
= 108,
124
G11
= 109,
125
G12
= 110,
126
G13
= 111,
127
G14
= 112,
128
G15
= 113,
129
130
H0
= 114,
131
H1
= 115,
132
H2
= 116,
133
H3
= 117,
134
H4
= 118,
135
H5
= 119,
136
H6
= 120,
137
H7
= 121,
138
H8
= 122,
139
H9
= 123,
140
H10
= 124,
141
H11
= 125,
142
H12
= 126,
143
H13
= 127,
144
H14
= 128,
145
H15
= 129,
146
147
/* Used by 176-pin STM32 MCUs */
148
I0
= 130,
149
I1
= 131,
150
I2
= 132,
151
I3
= 133,
152
I4
= 134,
153
I5
= 135,
154
I6
= 136,
155
I7
= 137,
156
I8
= 138,
157
I9
= 139,
158
I10
= 140,
159
I11
= 141,
160
I12
= 142,
161
I13
= 143,
162
I14
= 144,
163
I15
= 145,
164
165
/* Used by 208-pin STM32 MCUs */
166
J0
= 146,
167
J1
= 147,
168
J2
= 148,
169
J3
= 149,
170
J4
= 150,
171
J5
= 151,
172
J6
= 152,
173
J7
= 153,
174
J8
= 154,
175
J9
= 155,
176
J10
= 156,
177
J11
= 157,
178
J12
= 158,
179
J13
= 159,
180
J14
= 160,
181
J15
= 161,
182
183
K0
= 162,
184
K1
= 163,
185
K2
= 164,
186
K3
= 165,
187
K4
= 166,
188
K5
= 167,
189
K6
= 168,
190
K7
= 169,
191
K8
= 170,
192
K9
= 171,
193
K10
= 172,
194
K11
= 173,
195
K12
= 174,
196
K13
= 175,
197
K14
= 176,
198
K15
= 177,
199
200
MC33972_PIN_1
= 178,
201
MC33972_PIN_2
= 179,
202
MC33972_PIN_3
= 180,
203
MC33972_PIN_4
= 181,
204
MC33972_PIN_5
= 182,
205
MC33972_PIN_6
= 183,
206
MC33972_PIN_7
= 184,
207
MC33972_PIN_8
= 185,
208
MC33972_PIN_9
= 186,
209
MC33972_PIN_10
= 187,
210
MC33972_PIN_11
= 188,
211
MC33972_PIN_12
= 189,
212
MC33972_PIN_13
= 190,
213
MC33972_PIN_14
= 191,
214
MC33972_PIN_15
= 192,
215
MC33972_PIN_16
= 193,
216
MC33972_PIN_17
= 194,
217
MC33972_PIN_18
= 195,
218
MC33972_PIN_19
= 196,
219
MC33972_PIN_20
= 197,
220
MC33972_PIN_21
= 198,
221
MC33972_PIN_22
= 199,
222
223
TLE8888_PIN_1
= 200,
224
TLE8888_PIN_2
= 201,
225
TLE8888_PIN_3
= 202,
226
TLE8888_PIN_4
= 203,
227
TLE8888_PIN_5
= 204,
228
TLE8888_PIN_6
= 205,
229
TLE8888_PIN_7
= 206,
230
TLE8888_PIN_8
= 207,
231
TLE8888_PIN_9
= 208,
232
TLE8888_PIN_10
= 209,
233
TLE8888_PIN_11
= 210,
234
TLE8888_PIN_12
= 211,
235
TLE8888_PIN_13
= 212,
236
TLE8888_PIN_14
= 213,
237
TLE8888_PIN_15
= 214,
238
TLE8888_PIN_16
= 215,
239
TLE8888_PIN_17
= 216,
240
TLE8888_PIN_18
= 217,
241
TLE8888_PIN_19
= 218,
242
TLE8888_PIN_20
= 219,
243
TLE8888_PIN_21
= 220,
244
TLE8888_PIN_22
= 221,
245
TLE8888_PIN_23
= 222,
246
TLE8888_PIN_24
= 223,
247
TLE8888_PIN_25
= 224,
248
TLE8888_PIN_26
= 225,
249
TLE8888_PIN_27
= 226,
250
TLE8888_PIN_28
= 227,
251
TLE8888_PIN_MR
= 228,
252
TLE8888_PIN_KEY
= 229,
253
TLE8888_PIN_WAKE
= 230,
254
255
TLE6240_PIN_1
= 231,
256
TLE6240_PIN_2
= 232,
257
TLE6240_PIN_3
= 233,
258
TLE6240_PIN_4
= 234,
259
TLE6240_PIN_5
= 235,
260
TLE6240_PIN_6
= 236,
261
TLE6240_PIN_7
= 237,
262
TLE6240_PIN_8
= 238,
263
TLE6240_PIN_9
= 239,
264
TLE6240_PIN_10
= 240,
265
TLE6240_PIN_11
= 241,
266
TLE6240_PIN_12
= 242,
267
TLE6240_PIN_13
= 243,
268
TLE6240_PIN_14
= 244,
269
TLE6240_PIN_15
= 245,
270
TLE6240_PIN_16
= 246,
271
272
L9779_IGN_1
= 247,
273
L9779_IGN_2
= 248,
274
L9779_IGN_3
= 249,
275
L9779_IGN_4
= 250,
276
L9779_OUT_1
= 251,
277
L9779_OUT_2
= 252,
278
L9779_OUT_3
= 253,
279
L9779_OUT_4
= 254,
280
L9779_OUT_5
= 255,
281
L9779_OUT_6
= 256,
282
L9779_OUT_7
= 257,
283
L9779_OUT_8
= 258,
284
L9779_OUT_9
= 259,
285
L9779_OUT_10
= 260,
286
L9779_OUT_11
= 261,
287
L9779_OUT_12
= 262,
288
L9779_OUT_13
= 263,
289
L9779_OUT_14
= 264,
290
L9779_OUT_15
= 265,
291
L9779_OUT_16
= 266,
292
L9779_OUT_17
= 267,
293
L9779_OUT_18
= 268,
294
L9779_OUT_19
= 269,
295
L9779_OUT_20
= 270,
296
L9779_OUT_A
= 271,
297
L9779_OUT_B
= 272,
298
L9779_OUT_C
= 273,
299
L9779_OUT_D
= 274,
300
L9779_OUT_25
= 275,
301
L9779_OUT_26
= 276,
302
L9779_OUT_27
= 277,
303
L9779_OUT_28
= 278,
304
L9779_OUT_MRD
= 279,
305
L9779_PIN_KEY
= 280,
306
307
CAN_PIN_0
= 281,
308
CAN_PIN_1
= 282,
309
CAN_PIN_2
= 283,
310
CAN_PIN_3
= 284,
311
CAN_PIN_4
= 285,
312
CAN_PIN_5
= 286,
313
CAN_PIN_6
= 287,
314
CAN_PIN_7
= 288,
315
316
PROTECTED_PIN_0
= 289,
317
PROTECTED_PIN_1
= 290,
318
PROTECTED_PIN_2
= 291,
319
PROTECTED_PIN_3
= 292,
320
PROTECTED_PIN_4
= 293,
321
PROTECTED_PIN_5
= 294,
322
PROTECTED_PIN_6
= 295,
323
PROTECTED_PIN_7
= 296,
324
PROTECTED_PIN_8
= 297,
325
PROTECTED_PIN_9
= 298,
326
PROTECTED_PIN_10
= 299,
327
PROTECTED_PIN_11
= 300,
328
PROTECTED_PIN_12
= 301,
329
PROTECTED_PIN_13
= 302,
330
PROTECTED_PIN_14
= 303,
331
PROTECTED_PIN_15
= 304,
332
333
MC33810_0_OUT_0
= 305,
334
MC33810_0_OUT_1
= 306,
335
MC33810_0_OUT_2
= 307,
336
MC33810_0_OUT_3
= 308,
337
MC33810_0_GD_0
= 309,
338
MC33810_0_GD_1
= 310,
339
MC33810_0_GD_2
= 311,
340
MC33810_0_GD_3
= 312,
341
342
MC33810_1_OUT_0
= 313,
343
MC33810_1_OUT_1
= 314,
344
MC33810_1_OUT_2
= 315,
345
MC33810_1_OUT_3
= 316,
346
MC33810_1_GD_0
= 317,
347
MC33810_1_GD_1
= 318,
348
MC33810_1_GD_2
= 319,
349
MC33810_1_GD_3
= 320,
350
351
TLE9104_0_OUT_0
= 321,
352
TLE9104_0_OUT_1
= 322,
353
TLE9104_0_OUT_2
= 323,
354
TLE9104_0_OUT_3
= 324,
355
TLE9104_1_OUT_0
= 325,
356
TLE9104_1_OUT_1
= 326,
357
TLE9104_1_OUT_2
= 327,
358
TLE9104_1_OUT_3
= 328,
359
TLE9104_2_OUT_0
= 329,
360
TLE9104_2_OUT_1
= 330,
361
TLE9104_2_OUT_2
= 331,
362
TLE9104_2_OUT_3
= 332,
363
TLE9104_3_OUT_0
= 333,
364
TLE9104_3_OUT_1
= 334,
365
TLE9104_3_OUT_2
= 335,
366
TLE9104_3_OUT_3
= 336,
367
TLE9104_4_OUT_0
= 337,
368
TLE9104_4_OUT_1
= 338,
369
TLE9104_4_OUT_2
= 339,
370
TLE9104_4_OUT_3
= 340,
371
TLE9104_5_OUT_0
= 341,
372
TLE9104_5_OUT_1
= 342,
373
TLE9104_5_OUT_2
= 343,
374
TLE9104_5_OUT_3
= 344,
375
376
MSIOBOX_0_OUT_1
= 345,
377
MSIOBOX_0_OUT_2
= 346,
378
MSIOBOX_0_OUT_3
= 347,
379
MSIOBOX_0_OUT_4
= 348,
380
MSIOBOX_0_OUT_5
= 349,
381
MSIOBOX_0_OUT_6
= 350,
382
MSIOBOX_0_OUT_7
= 351,
383
MSIOBOX_0_OUT_8
= 352,
384
MSIOBOX_0_VSS_1
= 353,
385
MSIOBOX_0_VSS_2
= 354,
386
MSIOBOX_0_VSS_3
= 355,
387
MSIOBOX_0_VSS_4
= 356,
388
MSIOBOX_0_SW_1
= 357,
389
MSIOBOX_0_SW_2
= 358,
390
MSIOBOX_0_SW_3
= 359,
391
MSIOBOX_0_SW_4
= 360
392
};
393
394
/* Please keep updating these defines */
395
#define BRAIN_PIN_ONCHIP_LAST Gpio::K15
396
#define BRAIN_PIN_ONCHIP_PINS (BRAIN_PIN_ONCHIP_LAST - Gpio::A0 + 1)
397
#define BRAIN_PIN_LAST Gpio::MSIOBOX_0_SW_4
398
#define BRAIN_PIN_TOTAL_PINS (BRAIN_PIN_LAST - Gpio::A0 + 1)
Gpio
Gpio
Definition
rusefi_hw_stm32_enums.h:6
Gpio::TLE6240_PIN_10
@ TLE6240_PIN_10
Gpio::L9779_OUT_6
@ L9779_OUT_6
Gpio::I9
@ I9
Gpio::K10
@ K10
Gpio::MC33810_0_GD_3
@ MC33810_0_GD_3
Gpio::TLE8888_PIN_MR
@ TLE8888_PIN_MR
Gpio::TLE8888_PIN_27
@ TLE8888_PIN_27
Gpio::L9779_OUT_B
@ L9779_OUT_B
Gpio::L9779_IGN_2
@ L9779_IGN_2
Gpio::E12
@ E12
Gpio::MSIOBOX_0_OUT_4
@ MSIOBOX_0_OUT_4
Gpio::A6
@ A6
Gpio::K5
@ K5
Gpio::L9779_OUT_3
@ L9779_OUT_3
Gpio::A12
@ A12
Gpio::J4
@ J4
Gpio::A4
@ A4
Gpio::B3
@ B3
Gpio::D15
@ D15
Gpio::PROTECTED_PIN_15
@ PROTECTED_PIN_15
Gpio::D0
@ D0
Gpio::E0
@ E0
Gpio::H1
@ H1
Gpio::MSIOBOX_0_VSS_2
@ MSIOBOX_0_VSS_2
Gpio::CAN_PIN_1
@ CAN_PIN_1
Gpio::MSIOBOX_0_VSS_3
@ MSIOBOX_0_VSS_3
Gpio::MC33972_PIN_17
@ MC33972_PIN_17
Gpio::H13
@ H13
Gpio::MC33810_0_OUT_2
@ MC33810_0_OUT_2
Gpio::B9
@ B9
Gpio::G13
@ G13
Gpio::C1
@ C1
Gpio::PROTECTED_PIN_14
@ PROTECTED_PIN_14
Gpio::J3
@ J3
Gpio::G6
@ G6
Gpio::I7
@ I7
Gpio::TLE8888_PIN_15
@ TLE8888_PIN_15
Gpio::J8
@ J8
Gpio::MC33810_1_OUT_1
@ MC33810_1_OUT_1
Gpio::F6
@ F6
Gpio::MSIOBOX_0_OUT_2
@ MSIOBOX_0_OUT_2
Gpio::K9
@ K9
Gpio::L9779_OUT_14
@ L9779_OUT_14
Gpio::E4
@ E4
Gpio::G0
@ G0
Gpio::G15
@ G15
Gpio::H14
@ H14
Gpio::K4
@ K4
Gpio::F14
@ F14
Gpio::E6
@ E6
Gpio::MC33810_1_GD_3
@ MC33810_1_GD_3
Gpio::D4
@ D4
Gpio::J6
@ J6
Gpio::I13
@ I13
Gpio::A1
@ A1
Gpio::J0
@ J0
Gpio::TLE8888_PIN_26
@ TLE8888_PIN_26
Gpio::B5
@ B5
Gpio::H6
@ H6
Gpio::K3
@ K3
Gpio::PROTECTED_PIN_1
@ PROTECTED_PIN_1
Gpio::L9779_OUT_15
@ L9779_OUT_15
Gpio::L9779_OUT_9
@ L9779_OUT_9
Gpio::TLE9104_5_OUT_3
@ TLE9104_5_OUT_3
Gpio::TLE8888_PIN_12
@ TLE8888_PIN_12
Gpio::MC33972_PIN_10
@ MC33972_PIN_10
Gpio::TLE8888_PIN_WAKE
@ TLE8888_PIN_WAKE
Gpio::MC33810_1_GD_0
@ MC33810_1_GD_0
Gpio::MC33972_PIN_20
@ MC33972_PIN_20
Gpio::Unassigned
@ Unassigned
Gpio::I4
@ I4
Gpio::MC33972_PIN_11
@ MC33972_PIN_11
Gpio::F5
@ F5
Gpio::MC33810_1_OUT_0
@ MC33810_1_OUT_0
Gpio::PROTECTED_PIN_5
@ PROTECTED_PIN_5
Gpio::MC33972_PIN_2
@ MC33972_PIN_2
Gpio::I15
@ I15
Gpio::C3
@ C3
Gpio::L9779_IGN_1
@ L9779_IGN_1
Gpio::H7
@ H7
Gpio::PROTECTED_PIN_0
@ PROTECTED_PIN_0
Gpio::TLE9104_5_OUT_0
@ TLE9104_5_OUT_0
Gpio::MC33810_1_OUT_2
@ MC33810_1_OUT_2
Gpio::J7
@ J7
Gpio::TLE9104_4_OUT_0
@ TLE9104_4_OUT_0
Gpio::MC33810_0_OUT_0
@ MC33810_0_OUT_0
Gpio::A14
@ A14
Gpio::L9779_OUT_5
@ L9779_OUT_5
Gpio::L9779_PIN_KEY
@ L9779_PIN_KEY
Gpio::A10
@ A10
Gpio::CAN_PIN_4
@ CAN_PIN_4
Gpio::PROTECTED_PIN_3
@ PROTECTED_PIN_3
Gpio::F7
@ F7
Gpio::F8
@ F8
Gpio::E1
@ E1
Gpio::CAN_PIN_0
@ CAN_PIN_0
Gpio::L9779_IGN_3
@ L9779_IGN_3
Gpio::J1
@ J1
Gpio::D1
@ D1
Gpio::MC33810_0_OUT_3
@ MC33810_0_OUT_3
Gpio::E7
@ E7
Gpio::F3
@ F3
Gpio::Invalid
@ Invalid
Gpio::TLE8888_PIN_22
@ TLE8888_PIN_22
Gpio::B0
@ B0
Gpio::TLE6240_PIN_1
@ TLE6240_PIN_1
Gpio::K12
@ K12
Gpio::H15
@ H15
Gpio::MSIOBOX_0_SW_3
@ MSIOBOX_0_SW_3
Gpio::C7
@ C7
Gpio::TLE9104_0_OUT_0
@ TLE9104_0_OUT_0
Gpio::B10
@ B10
Gpio::L9779_OUT_1
@ L9779_OUT_1
Gpio::B14
@ B14
Gpio::MC33972_PIN_19
@ MC33972_PIN_19
Gpio::C14
@ C14
Gpio::MC33972_PIN_7
@ MC33972_PIN_7
Gpio::MC33972_PIN_22
@ MC33972_PIN_22
Gpio::E2
@ E2
Gpio::J5
@ J5
Gpio::C13
@ C13
Gpio::TLE9104_0_OUT_2
@ TLE9104_0_OUT_2
Gpio::I8
@ I8
Gpio::J10
@ J10
Gpio::H12
@ H12
Gpio::TLE6240_PIN_6
@ TLE6240_PIN_6
Gpio::E14
@ E14
Gpio::G9
@ G9
Gpio::L9779_IGN_4
@ L9779_IGN_4
Gpio::CAN_PIN_3
@ CAN_PIN_3
Gpio::G11
@ G11
Gpio::TLE6240_PIN_8
@ TLE6240_PIN_8
Gpio::TLE8888_PIN_23
@ TLE8888_PIN_23
Gpio::F11
@ F11
Gpio::TLE9104_0_OUT_3
@ TLE9104_0_OUT_3
Gpio::A3
@ A3
Gpio::CAN_PIN_6
@ CAN_PIN_6
Gpio::J13
@ J13
Gpio::TLE8888_PIN_25
@ TLE8888_PIN_25
Gpio::B6
@ B6
Gpio::MSIOBOX_0_OUT_7
@ MSIOBOX_0_OUT_7
Gpio::MSIOBOX_0_OUT_3
@ MSIOBOX_0_OUT_3
Gpio::PROTECTED_PIN_10
@ PROTECTED_PIN_10
Gpio::PROTECTED_PIN_4
@ PROTECTED_PIN_4
Gpio::H4
@ H4
Gpio::MC33972_PIN_18
@ MC33972_PIN_18
Gpio::TLE9104_4_OUT_3
@ TLE9104_4_OUT_3
Gpio::TLE8888_PIN_9
@ TLE8888_PIN_9
Gpio::MC33810_1_GD_1
@ MC33810_1_GD_1
Gpio::K8
@ K8
Gpio::L9779_OUT_7
@ L9779_OUT_7
Gpio::MC33972_PIN_14
@ MC33972_PIN_14
Gpio::C8
@ C8
Gpio::MC33972_PIN_21
@ MC33972_PIN_21
Gpio::TLE8888_PIN_1
@ TLE8888_PIN_1
Gpio::I10
@ I10
Gpio::D12
@ D12
Gpio::D10
@ D10
Gpio::E13
@ E13
Gpio::PROTECTED_PIN_12
@ PROTECTED_PIN_12
Gpio::MC33972_PIN_6
@ MC33972_PIN_6
Gpio::MSIOBOX_0_OUT_6
@ MSIOBOX_0_OUT_6
Gpio::K14
@ K14
Gpio::TLE8888_PIN_18
@ TLE8888_PIN_18
Gpio::TLE6240_PIN_13
@ TLE6240_PIN_13
Gpio::TLE6240_PIN_7
@ TLE6240_PIN_7
Gpio::C6
@ C6
Gpio::J2
@ J2
Gpio::I5
@ I5
Gpio::I2
@ I2
Gpio::H5
@ H5
Gpio::I11
@ I11
Gpio::TLE8888_PIN_11
@ TLE8888_PIN_11
Gpio::A9
@ A9
Gpio::L9779_OUT_26
@ L9779_OUT_26
Gpio::L9779_OUT_11
@ L9779_OUT_11
Gpio::E9
@ E9
Gpio::L9779_OUT_16
@ L9779_OUT_16
Gpio::F9
@ F9
Gpio::TLE6240_PIN_5
@ TLE6240_PIN_5
Gpio::J15
@ J15
Gpio::B12
@ B12
Gpio::TLE9104_2_OUT_0
@ TLE9104_2_OUT_0
Gpio::TLE8888_PIN_19
@ TLE8888_PIN_19
Gpio::TLE9104_1_OUT_0
@ TLE9104_1_OUT_0
Gpio::K13
@ K13
Gpio::TLE8888_PIN_2
@ TLE8888_PIN_2
Gpio::MSIOBOX_0_OUT_1
@ MSIOBOX_0_OUT_1
Gpio::TLE8888_PIN_KEY
@ TLE8888_PIN_KEY
Gpio::TLE8888_PIN_5
@ TLE8888_PIN_5
Gpio::C15
@ C15
Gpio::TLE9104_1_OUT_2
@ TLE9104_1_OUT_2
Gpio::L9779_OUT_17
@ L9779_OUT_17
Gpio::G5
@ G5
Gpio::D7
@ D7
Gpio::MC33972_PIN_9
@ MC33972_PIN_9
Gpio::F13
@ F13
Gpio::PROTECTED_PIN_8
@ PROTECTED_PIN_8
Gpio::L9779_OUT_20
@ L9779_OUT_20
Gpio::MC33972_PIN_1
@ MC33972_PIN_1
Gpio::MC33810_1_OUT_3
@ MC33810_1_OUT_3
Gpio::J9
@ J9
Gpio::CAN_PIN_7
@ CAN_PIN_7
Gpio::TLE9104_5_OUT_1
@ TLE9104_5_OUT_1
Gpio::L9779_OUT_8
@ L9779_OUT_8
Gpio::L9779_OUT_27
@ L9779_OUT_27
Gpio::TLE8888_PIN_6
@ TLE8888_PIN_6
Gpio::C0
@ C0
Gpio::J11
@ J11
Gpio::MC33972_PIN_13
@ MC33972_PIN_13
Gpio::L9779_OUT_12
@ L9779_OUT_12
Gpio::TLE8888_PIN_24
@ TLE8888_PIN_24
Gpio::TLE9104_1_OUT_1
@ TLE9104_1_OUT_1
Gpio::TLE8888_PIN_8
@ TLE8888_PIN_8
Gpio::G4
@ G4
Gpio::TLE9104_0_OUT_1
@ TLE9104_0_OUT_1
Gpio::I1
@ I1
Gpio::K1
@ K1
Gpio::MC33810_0_GD_2
@ MC33810_0_GD_2
Gpio::D3
@ D3
Gpio::C11
@ C11
Gpio::H10
@ H10
Gpio::PROTECTED_PIN_11
@ PROTECTED_PIN_11
Gpio::H9
@ H9
Gpio::TLE8888_PIN_7
@ TLE8888_PIN_7
Gpio::L9779_OUT_13
@ L9779_OUT_13
Gpio::MC33810_0_OUT_1
@ MC33810_0_OUT_1
Gpio::MC33810_1_GD_2
@ MC33810_1_GD_2
Gpio::TLE9104_3_OUT_3
@ TLE9104_3_OUT_3
Gpio::L9779_OUT_25
@ L9779_OUT_25
Gpio::TLE9104_4_OUT_2
@ TLE9104_4_OUT_2
Gpio::MC33972_PIN_12
@ MC33972_PIN_12
Gpio::D9
@ D9
Gpio::MSIOBOX_0_SW_4
@ MSIOBOX_0_SW_4
Gpio::L9779_OUT_28
@ L9779_OUT_28
Gpio::TLE8888_PIN_4
@ TLE8888_PIN_4
Gpio::L9779_OUT_C
@ L9779_OUT_C
Gpio::H3
@ H3
Gpio::MC33972_PIN_3
@ MC33972_PIN_3
Gpio::D8
@ D8
Gpio::E8
@ E8
Gpio::F10
@ F10
Gpio::PROTECTED_PIN_7
@ PROTECTED_PIN_7
Gpio::E3
@ E3
Gpio::TLE6240_PIN_14
@ TLE6240_PIN_14
Gpio::I14
@ I14
Gpio::TLE9104_2_OUT_3
@ TLE9104_2_OUT_3
Gpio::C4
@ C4
Gpio::B15
@ B15
Gpio::D14
@ D14
Gpio::H8
@ H8
Gpio::TLE6240_PIN_11
@ TLE6240_PIN_11
Gpio::TLE9104_4_OUT_1
@ TLE9104_4_OUT_1
Gpio::TLE8888_PIN_20
@ TLE8888_PIN_20
Gpio::MC33972_PIN_4
@ MC33972_PIN_4
Gpio::TLE6240_PIN_15
@ TLE6240_PIN_15
Gpio::B2
@ B2
Gpio::TLE8888_PIN_17
@ TLE8888_PIN_17
Gpio::D13
@ D13
Gpio::G3
@ G3
Gpio::K7
@ K7
Gpio::A7
@ A7
Gpio::G7
@ G7
Gpio::G1
@ G1
Gpio::MC33972_PIN_8
@ MC33972_PIN_8
Gpio::B11
@ B11
Gpio::D11
@ D11
Gpio::MC33972_PIN_5
@ MC33972_PIN_5
Gpio::TLE8888_PIN_14
@ TLE8888_PIN_14
Gpio::K0
@ K0
Gpio::MC33810_0_GD_1
@ MC33810_0_GD_1
Gpio::PROTECTED_PIN_9
@ PROTECTED_PIN_9
Gpio::H11
@ H11
Gpio::D2
@ D2
Gpio::PROTECTED_PIN_2
@ PROTECTED_PIN_2
Gpio::PROTECTED_PIN_6
@ PROTECTED_PIN_6
Gpio::J14
@ J14
Gpio::TLE9104_3_OUT_2
@ TLE9104_3_OUT_2
Gpio::A2
@ A2
Gpio::A5
@ A5
Gpio::CAN_PIN_2
@ CAN_PIN_2
Gpio::B8
@ B8
Gpio::L9779_OUT_10
@ L9779_OUT_10
Gpio::G14
@ G14
Gpio::TLE6240_PIN_9
@ TLE6240_PIN_9
Gpio::B1
@ B1
Gpio::H2
@ H2
Gpio::MC33810_0_GD_0
@ MC33810_0_GD_0
Gpio::A15
@ A15
Gpio::TLE8888_PIN_21
@ TLE8888_PIN_21
Gpio::L9779_OUT_2
@ L9779_OUT_2
Gpio::CAN_PIN_5
@ CAN_PIN_5
Gpio::TLE6240_PIN_4
@ TLE6240_PIN_4
Gpio::TLE6240_PIN_3
@ TLE6240_PIN_3
Gpio::G2
@ G2
Gpio::MSIOBOX_0_SW_1
@ MSIOBOX_0_SW_1
Gpio::MSIOBOX_0_OUT_8
@ MSIOBOX_0_OUT_8
Gpio::E15
@ E15
Gpio::TLE6240_PIN_16
@ TLE6240_PIN_16
Gpio::B4
@ B4
Gpio::TLE6240_PIN_2
@ TLE6240_PIN_2
Gpio::MSIOBOX_0_VSS_4
@ MSIOBOX_0_VSS_4
Gpio::L9779_OUT_19
@ L9779_OUT_19
Gpio::I6
@ I6
Gpio::B7
@ B7
Gpio::A0
@ A0
Gpio::TLE8888_PIN_3
@ TLE8888_PIN_3
Gpio::MC33972_PIN_16
@ MC33972_PIN_16
Gpio::MSIOBOX_0_VSS_1
@ MSIOBOX_0_VSS_1
Gpio::C10
@ C10
Gpio::TLE9104_3_OUT_0
@ TLE9104_3_OUT_0
Gpio::K6
@ K6
Gpio::TLE9104_5_OUT_2
@ TLE9104_5_OUT_2
Gpio::L9779_OUT_D
@ L9779_OUT_D
Gpio::L9779_OUT_A
@ L9779_OUT_A
Gpio::G8
@ G8
Gpio::H0
@ H0
Gpio::D6
@ D6
Gpio::TLE9104_2_OUT_1
@ TLE9104_2_OUT_1
Gpio::MSIOBOX_0_SW_2
@ MSIOBOX_0_SW_2
Gpio::F1
@ F1
Gpio::MC33972_PIN_15
@ MC33972_PIN_15
Gpio::K15
@ K15
Gpio::F15
@ F15
Gpio::TLE8888_PIN_13
@ TLE8888_PIN_13
Gpio::TLE8888_PIN_10
@ TLE8888_PIN_10
Gpio::E11
@ E11
Gpio::I12
@ I12
Gpio::C12
@ C12
Gpio::F4
@ F4
Gpio::L9779_OUT_4
@ L9779_OUT_4
Gpio::F12
@ F12
Gpio::TLE9104_1_OUT_3
@ TLE9104_1_OUT_3
Gpio::TLE6240_PIN_12
@ TLE6240_PIN_12
Gpio::MSIOBOX_0_OUT_5
@ MSIOBOX_0_OUT_5
Gpio::D5
@ D5
Gpio::G12
@ G12
Gpio::K2
@ K2
Gpio::B13
@ B13
Gpio::F0
@ F0
Gpio::C9
@ C9
Gpio::C2
@ C2
Gpio::TLE8888_PIN_28
@ TLE8888_PIN_28
Gpio::A13
@ A13
Gpio::PROTECTED_PIN_13
@ PROTECTED_PIN_13
Gpio::G10
@ G10
Gpio::I3
@ I3
Gpio::TLE9104_2_OUT_2
@ TLE9104_2_OUT_2
Gpio::A11
@ A11
Gpio::J12
@ J12
Gpio::I0
@ I0
Gpio::E5
@ E5
Gpio::TLE9104_3_OUT_1
@ TLE9104_3_OUT_1
Gpio::TLE8888_PIN_16
@ TLE8888_PIN_16
Gpio::E10
@ E10
Gpio::K11
@ K11
Gpio::A8
@ A8
Gpio::L9779_OUT_18
@ L9779_OUT_18
Gpio::L9779_OUT_MRD
@ L9779_OUT_MRD
Gpio::F2
@ F2
Gpio::C5
@ C5
Generated on Sat Sep 27 2025 00:10:04 for rusEFI by
1.9.8