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fsl_lpspi_edma.c
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1/*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#include "hal.h"
10#include "fsl_lpspi_edma.h"
11
12/***********************************************************************************************************************
13* Definitions
14***********************************************************************************************************************/
15
16/* Component ID definition, used by tools. */
17#ifndef FSL_COMPONENT_ID
18#define FSL_COMPONENT_ID "platform.drivers.lpspi_edma"
19#endif
20
21/*!
22* @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
23*/
24typedef struct _lpspi_master_edma_private_handle
25{
26 LPSPI_Type *base; /*!< LPSPI peripheral base address. */
27 lpspi_master_edma_handle_t *handle; /*!< lpspi_master_edma_handle_t handle */
29
30/*!
31* @brief Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
32*/
33typedef struct _lpspi_slave_edma_private_handle
34{
35 LPSPI_Type *base; /*!< LPSPI peripheral base address. */
36 lpspi_slave_edma_handle_t *handle; /*!< lpspi_slave_edma_handle_t handle */
38
39/***********************************************************************************************************************
40* Prototypes
41***********************************************************************************************************************/
42
43/*!
44* @brief Get instance number for LPSPI module.
45*
46* @param base LPSPI peripheral base address.
47* @return Return the value of LPSPI instance.
48*/
49static uint32_t LPSPI_GetInstance(LPSPI_Type *base);
50
51/*!
52* @brief EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA.
53* This is not a public API.
54*/
55static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
56 void *g_lpspiEdmaPrivateHandle,
57 bool transferDone,
58 uint32_t tcds);
59
60/*!
61* @brief EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA.
62* This is not a public API.
63*/
64static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
65 void *g_lpspiEdmaPrivateHandle,
66 bool transferDone,
67 uint32_t tcds);
68
69static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
70
71/***********************************************************************************************************************
72* Variables
73***********************************************************************************************************************/
74/*! @brief Pointers to lpspi bases for each instance. */
75static LPSPI_Type *const s_lpspiBases[] = LPSPI_BASE_PTRS;
76
77/*! @brief Pointers to lpspi edma handles for each instance. */
80
81/***********************************************************************************************************************
82* Code
83***********************************************************************************************************************/
84
85static uint32_t LPSPI_GetInstance(LPSPI_Type *base)
86{
87 uint8_t instance = 0;
88
89 /* Find the instance index from base address mappings. */
90 for (instance = 0; instance < ARRAY_SIZE(s_lpspiBases); instance++)
91 {
92 if (s_lpspiBases[instance] == base)
93 {
94 break;
95 }
96 }
97
98 assert(instance < ARRAY_SIZE(s_lpspiBases));
99
100 return instance;
101}
102
103static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap)
104{
105 assert(rxData);
106
107 switch (bytesEachRead)
108 {
109 case 1:
110 if (!isByteSwap)
111 {
112 *rxData = readData;
113 ++rxData;
114 }
115 else
116 {
117 *rxData = readData >> 24;
118 ++rxData;
119 }
120 break;
121
122 case 2:
123 if (!isByteSwap)
124 {
125 *rxData = readData;
126 ++rxData;
127 *rxData = readData >> 8;
128 ++rxData;
129 }
130 else
131 {
132 *rxData = readData >> 16;
133 ++rxData;
134 *rxData = readData >> 24;
135 ++rxData;
136 }
137 break;
138
139 case 4:
140
141 *rxData = readData;
142 ++rxData;
143 *rxData = readData >> 8;
144 ++rxData;
145 *rxData = readData >> 16;
146 ++rxData;
147 *rxData = readData >> 24;
148 ++rxData;
149
150 break;
151
152 default:
153 assert(false);
154 break;
155 }
156}
157
158/*!
159 * brief Initializes the LPSPI master eDMA handle.
160 *
161 * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a
162 * specified LPSPI instance, call this API once to get the initialized handle.
163 *
164 * Note that the LPSPI eDMA has a separated (Rx and Rx as two sources) or shared (Rx and Tx are the same source) DMA
165 * request source.
166 * (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and
167 * Tx DMAMUX source for edmaIntermediaryToTxRegHandle.
168 * (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle.
169 *
170 * param base LPSPI peripheral base address.
171 * param handle LPSPI handle pointer to lpspi_master_edma_handle_t.
172 * param callback LPSPI callback.
173 * param userData callback function parameter.
174 * param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
175 * param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
176 */
180 void *userData,
181 edma_handle_t *edmaRxRegToRxDataHandle,
182 edma_handle_t *edmaTxDataToTxRegHandle)
183{
184 assert(handle);
185 assert(edmaRxRegToRxDataHandle);
186 assert(edmaTxDataToTxRegHandle);
187
188 /* Zero the handle. */
189 memset(handle, 0, sizeof(*handle));
190
191 uint32_t instance = LPSPI_GetInstance(base);
192
195
196 handle->callback = callback;
197 handle->userData = userData;
198
199 handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
200 handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
201}
202
203/*!
204 * brief LPSPI master transfer data using eDMA.
205 *
206 * This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
207 * is transferred, the callback function is called.
208 *
209 * Note:
210 * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4.
211 * For bytesPerFrame greater than 4:
212 * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
213 * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
214 *
215 * param base LPSPI peripheral base address.
216 * param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
217 * param transfer pointer to lpspi_transfer_t structure.
218 * return status of status_t.
219 */
221{
222 assert(handle);
223 assert(transfer);
224
225 uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
226 uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
227 uint32_t temp = 0U;
228
229 if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
230 {
232 }
233
234 /*And since the dma transfer can not support 3 bytes .*/
235 if ((bytesPerFrame % 4U) == 3)
236 {
238 }
239
240 /* Check that we're not busy.*/
241 if (handle->state == kLPSPI_Busy)
242 {
243 return kStatus_LPSPI_Busy;
244 }
245
246 handle->state = kLPSPI_Busy;
247
248 uint32_t instance = LPSPI_GetInstance(base);
249 uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
250 uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
251
252 uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
253
254 /*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
255 uint8_t txWatermark = 0;
256 uint8_t rxWatermark = 0;
257
258 /*Used for byte swap*/
259 uint32_t dif = 0;
260
261 uint8_t bytesLastWrite = 0;
262
263 bool isThereExtraTxBytes = false;
264
265 uint8_t dummyData = g_lpspiDummyData[instance];
266
267 edma_transfer_config_t transferConfigRx;
268 edma_transfer_config_t transferConfigTx;
269
270 edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
271 edma_tcd_t *softwareTCD_pcsContinuous = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[2]) & (~0x1FU));
272
273 handle->txData = transfer->txData;
274 handle->rxData = transfer->rxData;
275 handle->txRemainingByteCount = transfer->dataSize;
276 handle->rxRemainingByteCount = transfer->dataSize;
277 handle->totalByteCount = transfer->dataSize;
278
279 handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
281
282 handle->txBuffIfNull =
283 ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
284
285 /*The TX and RX FIFO sizes are always the same*/
286 handle->fifoSize = LPSPI_GetRxFifoSize(base);
287
289 handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
290
291 LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
292
293 /*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
294 LPSPI_Enable(base, false);
295 base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
296 /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
297 temp = base->CFGR1;
298 temp &= LPSPI_CFGR1_PINCFG_MASK;
299 if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
300 {
301 if (!handle->txData)
302 {
303 base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
304 }
305 /* The 3-wire mode can't send and receive data at the same time. */
306 if ((handle->txData) && (handle->rxData))
307 {
309 }
310 }
311
312 /*Flush FIFO , clear status , disable all the inerrupts.*/
313 LPSPI_FlushFifo(base, true, true);
316
317 /* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
318 * hard to controlled by software.
319 */
320 base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK | LPSPI_TCR_PCS_MASK)) |
321 LPSPI_TCR_CONT(handle->isPcsContinuous) | LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) |
322 LPSPI_TCR_PCS(whichPcs);
323
324 isThereExtraTxBytes = false;
325 handle->isThereExtraRxBytes = false;
326
327 /*Calculate the bytes for write/read the TX/RX register each time*/
328 if (bytesPerFrame <= 4)
329 {
330 handle->bytesEachWrite = bytesPerFrame;
331 handle->bytesEachRead = bytesPerFrame;
332
333 handle->bytesLastRead = bytesPerFrame;
334 }
335 else
336 {
337 handle->bytesEachWrite = 4;
338 handle->bytesEachRead = 4;
339
340 handle->bytesLastRead = 4;
341
342 if ((transfer->dataSize % 4) != 0)
343 {
344 bytesLastWrite = transfer->dataSize % 4;
345 handle->bytesLastRead = bytesLastWrite;
346
347 isThereExtraTxBytes = true;
348
349 --handle->writeRegRemainingTimes;
350
351 --handle->readRegRemainingTimes;
352 handle->isThereExtraRxBytes = true;
353 }
354 }
355
357
360
361 /*Rx*/
363
364 if (handle->rxData)
365 {
366 transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
367 transferConfigRx.destOffset = 1;
368 }
369 else
370 {
371 transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
372 transferConfigRx.destOffset = 0;
373 }
375
376 dif = 0;
377 switch (handle->bytesEachRead)
378 {
379 case (1U):
380 transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
381 transferConfigRx.minorLoopBytes = 1;
382 if (handle->isByteSwap)
383 {
384 dif = 3;
385 }
386 break;
387
388 case (2U):
389 transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
390 transferConfigRx.minorLoopBytes = 2;
391 if (handle->isByteSwap)
392 {
393 dif = 2;
394 }
395 break;
396
397 case (4U):
398 transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
399 transferConfigRx.minorLoopBytes = 4;
400 break;
401
402 default:
403 transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
404 transferConfigRx.minorLoopBytes = 1;
405 assert(false);
406 break;
407 }
408
409 transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
410 transferConfigRx.srcOffset = 0;
411
412 transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
413
414 /* Store the initially configured eDMA minor byte transfer count into the LPSPI handle */
415 handle->nbytes = transferConfigRx.minorLoopBytes;
416
418 &transferConfigRx, NULL);
421
422 /*Tx*/
424
425 if (isThereExtraTxBytes)
426 {
427 if (handle->txData)
428 {
429 transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
430 transferConfigTx.srcOffset = 1;
431 }
432 else
433 {
434 transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
435 transferConfigTx.srcOffset = 0;
436 }
437
438 transferConfigTx.destOffset = 0;
439
440 transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
441
442 dif = 0;
443 switch (bytesLastWrite)
444 {
445 case (1U):
447 transferConfigTx.minorLoopBytes = 1;
448 if (handle->isByteSwap)
449 {
450 dif = 3;
451 }
452 break;
453
454 case (2U):
456 transferConfigTx.minorLoopBytes = 2;
457 if (handle->isByteSwap)
458 {
459 dif = 2;
460 }
461 break;
462
463 default:
465 transferConfigTx.minorLoopBytes = 1;
466 assert(false);
467 break;
468 }
469
470 transferConfigTx.destAddr = (uint32_t)txAddr + dif;
471 transferConfigTx.majorLoopCounts = 1;
472
473 EDMA_TcdReset(softwareTCD_extraBytes);
474
475 if (handle->isPcsContinuous)
476 {
477 EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, softwareTCD_pcsContinuous);
478 }
479 else
480 {
481 EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
482 }
483 }
484
485 if (handle->isPcsContinuous)
486 {
487 handle->transmitCommand = base->TCR & ~(LPSPI_TCR_CONTC_MASK | LPSPI_TCR_CONT_MASK);
488
489 transferConfigTx.srcAddr = (uint32_t) & (handle->transmitCommand);
490 transferConfigTx.srcOffset = 0;
491
492 transferConfigTx.destAddr = (uint32_t) & (base->TCR);
493 transferConfigTx.destOffset = 0;
494
495 transferConfigTx.srcTransferSize = kEDMA_TransferSize4Bytes;
497 transferConfigTx.minorLoopBytes = 4;
498 transferConfigTx.majorLoopCounts = 1;
499
500 EDMA_TcdReset(softwareTCD_pcsContinuous);
501 EDMA_TcdSetTransferConfig(softwareTCD_pcsContinuous, &transferConfigTx, NULL);
502 }
503
504 if (handle->txData)
505 {
506 transferConfigTx.srcAddr = (uint32_t)(handle->txData);
507 transferConfigTx.srcOffset = 1;
508 }
509 else
510 {
511 transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
512 transferConfigTx.srcOffset = 0;
513 }
514
515 transferConfigTx.destOffset = 0;
516
517 transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
518
519 dif = 0;
520 switch (handle->bytesEachRead)
521 {
522 case (1U):
524 transferConfigTx.minorLoopBytes = 1;
525 if (handle->isByteSwap)
526 {
527 dif = 3;
528 }
529 break;
530
531 case (2U):
533 transferConfigTx.minorLoopBytes = 2;
534
535 if (handle->isByteSwap)
536 {
537 dif = 2;
538 }
539 break;
540
541 case (4U):
543 transferConfigTx.minorLoopBytes = 4;
544 break;
545
546 default:
548 transferConfigTx.minorLoopBytes = 1;
549 assert(false);
550 break;
551 }
552
553 transferConfigTx.destAddr = (uint32_t)txAddr + dif;
554
555 transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
556
557 if (isThereExtraTxBytes)
558 {
560 &transferConfigTx, softwareTCD_extraBytes);
561 }
562 else if (handle->isPcsContinuous)
563 {
565 &transferConfigTx, softwareTCD_pcsContinuous);
566 }
567 else
568 {
570 &transferConfigTx, NULL);
571 }
572
575
577 LPSPI_Enable(base, true);
578
579 return kStatus_Success;
580}
581
583 void *g_lpspiEdmaPrivateHandle,
584 bool transferDone,
585 uint32_t tcds)
586{
587 assert(edmaHandle);
588 assert(g_lpspiEdmaPrivateHandle);
589
590 uint32_t readData;
591
592 lpspi_master_edma_private_handle_t *lpspiEdmaPrivateHandle;
593
594 lpspiEdmaPrivateHandle = (lpspi_master_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
595
596 LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
597
598 if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
599 {
600 while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
601 {
602 }
603 readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
604
605 if (lpspiEdmaPrivateHandle->handle->rxData)
606 {
608 &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
609 lpspiEdmaPrivateHandle->handle->bytesLastRead]),
610 readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
611 }
612 }
613
614 lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
615
616 if (lpspiEdmaPrivateHandle->handle->callback)
617 {
618 lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
619 kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
620 }
621}
622
623/*!
624 * brief LPSPI master aborts a transfer which is using eDMA.
625 *
626 * This function aborts a transfer which is using eDMA.
627 *
628 * param base LPSPI peripheral base address.
629 * param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
630 */
632{
633 assert(handle);
634
636
639
640 handle->state = kLPSPI_Idle;
641}
642
643/*!
644 * brief Gets the master eDMA transfer remaining bytes.
645 *
646 * This function gets the master eDMA transfer remaining bytes.
647 *
648 * param base LPSPI peripheral base address.
649 * param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
650 * param count Number of bytes transferred so far by the EDMA transaction.
651 * return status of status_t.
652 */
654{
655 assert(handle);
656
657 if (!count)
658 {
660 }
661
662 /* Catch when there is not an active transfer. */
663 if (handle->state != kLPSPI_Busy)
664 {
665 *count = 0;
667 }
668
669 size_t remainingByte;
670
671 remainingByte =
674
675 *count = handle->totalByteCount - remainingByte;
676
677 return kStatus_Success;
678}
679
680/*!
681 * brief Initializes the LPSPI slave eDMA handle.
682 *
683 * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a
684 * specified LPSPI instance, call this API once to get the initialized handle.
685 *
686 * Note that LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx as the same source) DMA request
687 * source.
688 *
689 * (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and
690 * Tx DMAMUX source for edmaTxDataToTxRegHandle.
691 * (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle .
692 *
693 * param base LPSPI peripheral base address.
694 * param handle LPSPI handle pointer to lpspi_slave_edma_handle_t.
695 * param callback LPSPI callback.
696 * param userData callback function parameter.
697 * param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
698 * param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
699 */
703 void *userData,
704 edma_handle_t *edmaRxRegToRxDataHandle,
705 edma_handle_t *edmaTxDataToTxRegHandle)
706{
707 assert(handle);
708 assert(edmaRxRegToRxDataHandle);
709 assert(edmaTxDataToTxRegHandle);
710
711 /* Zero the handle. */
712 memset(handle, 0, sizeof(*handle));
713
714 uint32_t instance = LPSPI_GetInstance(base);
715
718
719 handle->callback = callback;
720 handle->userData = userData;
721
722 handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
723 handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
724}
725
726/*!
727 * brief LPSPI slave transfers data using eDMA.
728 *
729 * This function transfers data using eDMA. This is a non-blocking function, which return right away. When all data
730 * is transferred, the callback function is called.
731 *
732 * Note:
733 * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4.
734 * For bytesPerFrame greater than 4:
735 * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
736 * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
737 *
738 * param base LPSPI peripheral base address.
739 * param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
740 * param transfer pointer to lpspi_transfer_t structure.
741 * return status of status_t.
742 */
744{
745 assert(handle);
746 assert(transfer);
747
748 uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
749 uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
750 uint32_t temp = 0U;
751
752 uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
753
754 if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
755 {
757 }
758
759 /*And since the dma transfer can not support 3 bytes .*/
760 if ((bytesPerFrame % 4U) == 3)
761 {
763 }
764
765 /* Check that we're not busy.*/
766 if (handle->state == kLPSPI_Busy)
767 {
768 return kStatus_LPSPI_Busy;
769 }
770
771 handle->state = kLPSPI_Busy;
772
773 uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
774 uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
775
776 edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
777
778 uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
779
780 /*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
781 uint8_t txWatermark = 0;
782 uint8_t rxWatermark = 0;
783
784 /*Used for byte swap*/
785 uint32_t dif = 0;
786
787 uint8_t bytesLastWrite = 0;
788
789 uint32_t instance = LPSPI_GetInstance(base);
790
791 edma_transfer_config_t transferConfigRx;
792 edma_transfer_config_t transferConfigTx;
793
794 bool isThereExtraTxBytes = false;
795
796 handle->txData = transfer->txData;
797 handle->rxData = transfer->rxData;
798 handle->txRemainingByteCount = transfer->dataSize;
799 handle->rxRemainingByteCount = transfer->dataSize;
800 handle->totalByteCount = transfer->dataSize;
801
802 handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
804
805 handle->txBuffIfNull =
806 ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
807
808 /*The TX and RX FIFO sizes are always the same*/
809 handle->fifoSize = LPSPI_GetRxFifoSize(base);
810
811 handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
812
813 LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
814
815 /*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
816 LPSPI_Enable(base, false);
817 base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
818 /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
819 temp = base->CFGR1;
820 temp &= LPSPI_CFGR1_PINCFG_MASK;
821 if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
822 {
823 if (!handle->txData)
824 {
825 base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
826 }
827 /* The 3-wire mode can't send and receive data at the same time. */
828 if ((handle->txData) && (handle->rxData))
829 {
831 }
832 }
833
834 /*Flush FIFO , clear status , disable all the inerrupts.*/
835 LPSPI_FlushFifo(base, true, true);
838
839 /* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
840 * hard to controlled by software.
841 */
842 base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK)) |
843 LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) | LPSPI_TCR_PCS(whichPcs);
844
845 isThereExtraTxBytes = false;
846 handle->isThereExtraRxBytes = false;
847
848 /*Calculate the bytes for write/read the TX/RX register each time*/
849 if (bytesPerFrame <= 4)
850 {
851 handle->bytesEachWrite = bytesPerFrame;
852 handle->bytesEachRead = bytesPerFrame;
853
854 handle->bytesLastRead = bytesPerFrame;
855 }
856 else
857 {
858 handle->bytesEachWrite = 4;
859 handle->bytesEachRead = 4;
860
861 handle->bytesLastRead = 4;
862
863 if ((transfer->dataSize % 4) != 0)
864 {
865 bytesLastWrite = transfer->dataSize % 4;
866 handle->bytesLastRead = bytesLastWrite;
867
868 isThereExtraTxBytes = true;
869 --handle->writeRegRemainingTimes;
870
871 handle->isThereExtraRxBytes = true;
872 --handle->readRegRemainingTimes;
873 }
874 }
875
877
880
881 /*Rx*/
882 if (handle->readRegRemainingTimes > 0)
883 {
885
886 if (handle->rxData)
887 {
888 transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
889 transferConfigRx.destOffset = 1;
890 }
891 else
892 {
893 transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
894 transferConfigRx.destOffset = 0;
895 }
897
898 dif = 0;
899 switch (handle->bytesEachRead)
900 {
901 case (1U):
902 transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
903 transferConfigRx.minorLoopBytes = 1;
904 if (handle->isByteSwap)
905 {
906 dif = 3;
907 }
908 break;
909
910 case (2U):
911 transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
912 transferConfigRx.minorLoopBytes = 2;
913 if (handle->isByteSwap)
914 {
915 dif = 2;
916 }
917 break;
918
919 case (4U):
920 transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
921 transferConfigRx.minorLoopBytes = 4;
922 break;
923
924 default:
925 transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
926 transferConfigRx.minorLoopBytes = 1;
927 assert(false);
928 break;
929 }
930
931 transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
932 transferConfigRx.srcOffset = 0;
933
934 transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
935
936 /* Store the initially configured eDMA minor byte transfer count into the DSPI handle */
937 handle->nbytes = transferConfigRx.minorLoopBytes;
938
940 &transferConfigRx, NULL);
943 }
944
945 /*Tx*/
947
948 if (isThereExtraTxBytes)
949 {
950 if (handle->txData)
951 {
952 transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
953 transferConfigTx.srcOffset = 1;
954 }
955 else
956 {
957 transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
958 transferConfigTx.srcOffset = 0;
959 }
960
961 transferConfigTx.destOffset = 0;
962
963 transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
964
965 dif = 0;
966 switch (bytesLastWrite)
967 {
968 case (1U):
970 transferConfigTx.minorLoopBytes = 1;
971 if (handle->isByteSwap)
972 {
973 dif = 3;
974 }
975 break;
976
977 case (2U):
979 transferConfigTx.minorLoopBytes = 2;
980 if (handle->isByteSwap)
981 {
982 dif = 2;
983 }
984 break;
985
986 default:
988 transferConfigTx.minorLoopBytes = 1;
989 assert(false);
990 break;
991 }
992
993 transferConfigTx.destAddr = (uint32_t)txAddr + dif;
994 transferConfigTx.majorLoopCounts = 1;
995
996 EDMA_TcdReset(softwareTCD_extraBytes);
997
998 EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
999 }
1000
1001 if (handle->txData)
1002 {
1003 transferConfigTx.srcAddr = (uint32_t)(handle->txData);
1004 transferConfigTx.srcOffset = 1;
1005 }
1006 else
1007 {
1008 transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
1009 transferConfigTx.srcOffset = 0;
1010 }
1011
1012 transferConfigTx.destOffset = 0;
1013
1014 transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
1015
1016 dif = 0;
1017 switch (handle->bytesEachRead)
1018 {
1019 case (1U):
1020 transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
1021 transferConfigTx.minorLoopBytes = 1;
1022 if (handle->isByteSwap)
1023 {
1024 dif = 3;
1025 }
1026 break;
1027
1028 case (2U):
1029 transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
1030 transferConfigTx.minorLoopBytes = 2;
1031
1032 if (handle->isByteSwap)
1033 {
1034 dif = 2;
1035 }
1036 break;
1037
1038 case (4U):
1039 transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
1040 transferConfigTx.minorLoopBytes = 4;
1041 break;
1042
1043 default:
1044 transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
1045 transferConfigTx.minorLoopBytes = 1;
1046 assert(false);
1047 break;
1048 }
1049
1050 transferConfigTx.destAddr = (uint32_t)txAddr + dif;
1051
1052 transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
1053
1054 if (isThereExtraTxBytes)
1055 {
1057 &transferConfigTx, softwareTCD_extraBytes);
1058 }
1059 else
1060 {
1062 &transferConfigTx, NULL);
1063 }
1064
1067
1069 LPSPI_Enable(base, true);
1070
1071 return kStatus_Success;
1072}
1073
1075 void *g_lpspiEdmaPrivateHandle,
1076 bool transferDone,
1077 uint32_t tcds)
1078{
1079 assert(edmaHandle);
1080 assert(g_lpspiEdmaPrivateHandle);
1081
1082 uint32_t readData;
1083
1084 lpspi_slave_edma_private_handle_t *lpspiEdmaPrivateHandle;
1085
1086 lpspiEdmaPrivateHandle = (lpspi_slave_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
1087
1088 LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
1089
1090 if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
1091 {
1092 while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
1093 {
1094 }
1095 readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
1096
1097 if (lpspiEdmaPrivateHandle->handle->rxData)
1098 {
1100 &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
1101 lpspiEdmaPrivateHandle->handle->bytesLastRead]),
1102 readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
1103 }
1104 }
1105
1106 lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
1107
1108 if (lpspiEdmaPrivateHandle->handle->callback)
1109 {
1110 lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
1111 kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
1112 }
1113}
1114
1115/*!
1116 * brief LPSPI slave aborts a transfer which is using eDMA.
1117 *
1118 * This function aborts a transfer which is using eDMA.
1119 *
1120 * param base LPSPI peripheral base address.
1121 * param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
1122 */
1124{
1125 assert(handle);
1126
1128
1131
1132 handle->state = kLPSPI_Idle;
1133}
1134
1135/*!
1136 * brief Gets the slave eDMA transfer remaining bytes.
1137 *
1138 * This function gets the slave eDMA transfer remaining bytes.
1139 *
1140 * param base LPSPI peripheral base address.
1141 * param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
1142 * param count Number of bytes transferred so far by the eDMA transaction.
1143 * return status of status_t.
1144 */
1146{
1147 assert(handle);
1148
1149 if (!count)
1150 {
1152 }
1153
1154 /* Catch when there is not an active transfer. */
1155 if (handle->state != kLPSPI_Busy)
1156 {
1157 *count = 0;
1159 }
1160
1161 size_t remainingByte;
1162
1163 remainingByte =
1166
1167 *count = handle->totalByteCount - remainingByte;
1168
1169 return kStatus_Success;
1170}
static BenchController instance
static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle, void *g_lpspiEdmaPrivateHandle, bool transferDone, uint32_t tcds)
EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA. This is not a publi...
static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle, void *g_lpspiEdmaPrivateHandle, bool transferDone, uint32_t tcds)
EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA. This is not a public ...
static uint32_t LPSPI_GetInstance(LPSPI_Type *base)
Get instance number for LPSPI module.
struct _lpspi_slave_edma_private_handle lpspi_slave_edma_private_handle_t
Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap)
static LPSPI_Type *const s_lpspiBases[]
Pointers to lpspi bases for each instance.
struct _lpspi_master_edma_private_handle lpspi_master_edma_private_handle_t
Structure definition for dspi_master_edma_private_handle_t. The structure is private.
static lpspi_master_edma_private_handle_t s_lpspiMasterEdmaPrivateHandle[ARRAY_SIZE(s_lpspiBases)]
Pointers to lpspi edma handles for each instance.
static lpspi_slave_edma_private_handle_t s_lpspiSlaveEdmaPrivateHandle[ARRAY_SIZE(s_lpspiBases)]
uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel)
Gets the remaining major loop count from the eDMA current channel TCD.
Definition fsl_edma.c:648
edma_transfer_size_t destTransferSize
Definition fsl_edma.h:175
void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)
Enables the interrupt source for the eDMA transfer.
Definition fsl_edma.c:330
void EDMA_AbortTransfer(edma_handle_t *handle)
eDMA aborts transfer.
Definition fsl_edma.c:1164
DMA_Type * base
Definition fsl_edma.h:249
uint32_t majorLoopCounts
Definition fsl_edma.h:181
void EDMA_TcdReset(edma_tcd_t *tcd)
Sets all fields to default values for the TCD structure.
Definition fsl_edma.c:392
edma_transfer_size_t srcTransferSize
Definition fsl_edma.h:174
void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)
Installs a callback function for the eDMA transfer.
Definition fsl_edma.c:836
uint32_t minorLoopBytes
Definition fsl_edma.h:180
void EDMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)
Configures the eDMA transfer attribute.
Definition fsl_edma.c:221
void EDMA_StartTransfer(edma_handle_t *handle)
eDMA starts transfer.
Definition fsl_edma.c:1103
uint8_t channel
Definition fsl_edma.h:251
void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)
Configures the eDMA TCD transfer attribute.
Definition fsl_edma.c:439
void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)
Sets all TCD registers to default values.
Definition fsl_edma.c:189
@ kEDMA_MajorInterruptEnable
Definition fsl_edma.h:131
@ kEDMA_TransferSize4Bytes
Definition fsl_edma.h:40
@ kEDMA_TransferSize2Bytes
Definition fsl_edma.h:39
@ kEDMA_TransferSize1Bytes
Definition fsl_edma.h:38
int32_t status_t
Type used for all status and error return values.
Definition fsl_common.h:169
@ kStatus_Success
Definition fsl_common.h:159
@ kStatus_NoTransferInProgress
Definition fsl_common.h:165
@ kStatus_InvalidArgument
Definition fsl_common.h:163
static uint32_t LPSPI_GetRxFifoSize(LPSPI_Type *base)
Gets the LPSPI Rx FIFO size.
Definition fsl_lpspi.h:537
static void LPSPI_FlushFifo(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)
Flushes the LPSPI FIFOs.
Definition fsl_lpspi.h:743
static void LPSPI_DisableInterrupts(LPSPI_Type *base, uint32_t mask)
Disables the LPSPI interrupts.
Definition fsl_lpspi.h:617
static uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)
Gets the LPSPI Receive Data Register address for a DMA operation.
Definition fsl_lpspi.h:688
static void LPSPI_ClearStatusFlags(LPSPI_Type *base, uint32_t statusFlags)
Clears the LPSPI status flag.
Definition fsl_lpspi.h:575
static void LPSPI_Enable(LPSPI_Type *base, bool enable)
Enables the LPSPI peripheral and sets the MCR MDIS to 0.
Definition fsl_lpspi.h:491
static void LPSPI_SetFifoWatermarks(LPSPI_Type *base, uint32_t txWater, uint32_t rxWater)
Sets the transmit and receive FIFO watermark values.
Definition fsl_lpspi.h:759
volatile uint8_t g_lpspiDummyData[ARRAY_SIZE(s_lpspiBases)]
Global variable for dummy data value setting.
Definition fsl_lpspi.c:142
static void LPSPI_EnableDMA(LPSPI_Type *base, uint32_t mask)
Enables the LPSPI DMA request.
Definition fsl_lpspi.h:642
static uint32_t LPSPI_ReadData(LPSPI_Type *base)
Reads data from the data buffer.
Definition fsl_lpspi.h:918
bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame)
Check the argument for transfer .
Definition fsl_lpspi.c:713
static uint32_t LPSPI_GetRxFifoCount(LPSPI_Type *base)
Gets the LPSPI Rx FIFO count.
Definition fsl_lpspi.h:557
static uint32_t LPSPI_GetTxRegisterAddress(LPSPI_Type *base)
Gets the LPSPI Transmit Data Register address for a DMA operation.
Definition fsl_lpspi.h:673
static void LPSPI_DisableDMA(LPSPI_Type *base, uint32_t mask)
Disables the LPSPI DMA request.
Definition fsl_lpspi.h:658
@ kLPSPI_Busy
Definition fsl_lpspi.h:250
@ kLPSPI_Idle
Definition fsl_lpspi.h:249
@ kLPSPI_SdiInSdiOut
Definition fsl_lpspi.h:164
@ kLPSPI_SdoInSdoOut
Definition fsl_lpspi.h:165
@ kLPSPI_MasterPcsContinuous
Definition fsl_lpspi.h:203
@ kLPSPI_MasterByteSwap
Definition fsl_lpspi.h:205
@ kStatus_LPSPI_Busy
Definition fsl_lpspi.h:39
@ kLPSPI_AllInterruptEnable
Definition fsl_lpspi.h:73
@ kLPSPI_AllStatusFlag
Definition fsl_lpspi.h:57
@ kLPSPI_TxDmaEnable
Definition fsl_lpspi.h:81
@ kLPSPI_RxDmaEnable
Definition fsl_lpspi.h:82
status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count)
Gets the master eDMA transfer remaining bytes.
edma_handle_t * edmaTxDataToTxRegHandle
lpspi_master_edma_transfer_callback_t callback
void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)
Initializes the LPSPI master eDMA handle.
volatile uint8_t fifoSize
volatile uint8_t bytesEachWrite
volatile uint8_t bytesEachRead
edma_handle_t * edmaRxRegToRxDataHandle
volatile uint32_t readRegRemainingTimes
void(* lpspi_master_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, status_t status, void *userData)
Completion callback function pointer type.
volatile uint32_t writeRegRemainingTimes
uint8_t *volatile txData
uint8_t *volatile rxData
void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle)
LPSPI slave aborts a transfer which is using eDMA.
volatile uint8_t bytesLastRead
uint8_t *volatile txData
volatile uint8_t bytesEachWrite
volatile size_t rxRemainingByteCount
volatile uint8_t isThereExtraRxBytes
lpspi_slave_edma_transfer_callback_t callback
volatile uint8_t isThereExtraRxBytes
volatile uint8_t fifoSize
volatile uint8_t bytesEachRead
volatile uint32_t writeRegRemainingTimes
uint8_t *volatile rxData
edma_handle_t * edmaTxDataToTxRegHandle
status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)
LPSPI master transfer data using eDMA.
void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle)
LPSPI master aborts a transfer which is using eDMA.
volatile size_t rxRemainingByteCount
void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)
Initializes the LPSPI slave eDMA handle.
status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer)
LPSPI slave transfers data using eDMA.
edma_handle_t * edmaRxRegToRxDataHandle
volatile size_t txRemainingByteCount
volatile uint32_t readRegRemainingTimes
status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count)
Gets the slave eDMA transfer remaining bytes.
volatile size_t txRemainingByteCount
volatile uint8_t bytesLastRead
void(* lpspi_slave_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, status_t status, void *userData)
Completion callback function pointer type.
eDMA transfer handle structure
Definition fsl_edma.h:246
eDMA TCD.
Definition fsl_edma.h:207
eDMA transfer configuration
Definition fsl_edma.h:171
LPSPI master eDMA transfer handle structure used for transactional API.
LPSPI slave eDMA transfer handle structure used for transactional API.
LPSPI master/slave transfer structure.
Definition fsl_lpspi.h:337
uint8_t * rxData
Definition fsl_lpspi.h:339
uint32_t configFlags
Definition fsl_lpspi.h:343
volatile size_t dataSize
Definition fsl_lpspi.h:340
uint8_t * txData
Definition fsl_lpspi.h:338
uint16_t count
Definition tunerstudio.h:1