FLASH Private Functions

Collaboration diagram for FLASH Private Functions:

Functions
static void	FLASH_MassErase (uint8_t VoltageRange, uint32_t Banks)
	Full erase of FLASH memory sectors.
void	FLASH_FlushCaches (void)
	Flush the instruction and data caches.
static HAL_StatusTypeDef	FLASH_OB_EnableWRP (uint32_t WRPSector, uint32_t Banks)
	Enable the write protection of the desired bank1 or bank 2 sectors.
static HAL_StatusTypeDef	FLASH_OB_DisableWRP (uint32_t WRPSector, uint32_t Banks)
	Disable the write protection of the desired bank1 or bank 2 sectors.
static HAL_StatusTypeDef	FLASH_OB_RDP_LevelConfig (uint8_t Level)
	Set the read protection level.
static HAL_StatusTypeDef	FLASH_OB_UserConfig (uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
	Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
static HAL_StatusTypeDef	FLASH_OB_BOR_LevelConfig (uint8_t Level)
	Set the BOR Level.
static uint8_t	FLASH_OB_GetUser (void)
	Return the FLASH User Option Byte value.
static uint16_t	FLASH_OB_GetWRP (void)
	Return the FLASH Write Protection Option Bytes value.
static uint8_t	FLASH_OB_GetRDP (void)
	Returns the FLASH Read Protection level.
static uint8_t	FLASH_OB_GetBOR (void)
	Returns the FLASH BOR level.
static HAL_StatusTypeDef	FLASH_OB_EnablePCROP (uint32_t Sector)
	Enable the read/write protection (PCROP) of the desired sectors.
static HAL_StatusTypeDef	FLASH_OB_DisablePCROP (uint32_t Sector)
	Disable the read/write protection (PCROP) of the desired sectors.
static HAL_StatusTypeDef	FLASH_OB_EnablePCROP (uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
	Enable the read/write protection (PCROP) of the desired sectors of Bank 1 and/or Bank 2.
static HAL_StatusTypeDef	FLASH_OB_DisablePCROP (uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
	Disable the read/write protection (PCROP) of the desired sectors of Bank 1 and/or Bank 2.
static HAL_StatusTypeDef	FLASH_OB_BootConfig (uint8_t BootConfig)
	Configure the Dual Bank Boot.
HAL_StatusTypeDef	FLASH_WaitForLastOperation (uint32_t Timeout)
	Wait for a FLASH operation to complete.
void	FLASH_Erase_Sector (uint32_t Sector, uint8_t VoltageRange)
	Erase the specified FLASH memory sector.
static HAL_StatusTypeDef	FLASH_OB_EnableWRP (uint32_t WRPSector)
	Enable the write protection of the desired bank1 or bank2 sectors.
static HAL_StatusTypeDef	FLASH_OB_DisableWRP (uint32_t WRPSector)
	Disable the write protection of the desired bank1 or bank 2 sectors.
static HAL_StatusTypeDef	FLASH_OB_BootAddressConfig (uint32_t BootOption, uint32_t Address)
	Configure Boot base address.
static uint32_t	FLASH_OB_GetBootAddress (uint32_t BootOption)
	Configure Boot base address.
static HAL_StatusTypeDef	FLASH_OB_UserConfig (uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, \ uint32_t Iwdgstdby, uint32_t NDBank, uint32_t NDBoot)
	Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
static void	FLASH_MassErase (uint8_t VoltageRange)
	Full erase of FLASH memory sectors.
static HAL_StatusTypeDef	FLASH_OB_UserConfig (uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, uint32_t Iwdgstdby)
	Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
static HAL_StatusTypeDef	FLASH_OB_PCROP_Config (uint32_t PCROPSector)
	Set the PCROP protection for sectors.
static HAL_StatusTypeDef	FLASH_OB_PCROP_RDP_Config (uint32_t Pcrop_Rdp)
	Set the PCROP_RDP value.
static uint32_t	FLASH_OB_GetPCROP (void)
	Return the FLASH PCROP Protection Option Bytes value.
static uint32_t	FLASH_OB_GetPCROPRDP (void)
	Return the FLASH PCROP_RDP option byte value.
static void	FLASH_MassErase (uint32_t VoltageRange, uint32_t Banks)
	Mass erase of FLASH memory.
static void	FLASH_OB_GetWRP (uint32_t *WRPState, uint32_t *WRPSector, uint32_t Bank)
	Get the write protection of the given bank 1 or bank 2 sectors.
static void	FLASH_OB_RDPConfig (uint32_t RDPLevel)
	Set the read protection level.
static void	FLASH_OB_PCROPConfig (uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr, uint32_t Banks)
	Configure the Proprietary code readout protection of the desired addresses.
static void	FLASH_OB_GetPCROP (uint32_t *PCROPConfig, uint32_t *PCROPStartAddr, uint32_t *PCROPEndAddr, uint32_t Bank)
	Get the Proprietary code readout protection configuration on a given Bank.
static void	FLASH_OB_BOR_LevelConfig (uint32_t Level)
	Set the BOR Level.
static void	FLASH_OB_UserConfig (uint32_t UserType, uint32_t UserConfig)
	Program the FLASH User Option Byte.
static void	FLASH_OB_BootAddConfig (uint32_t BootOption, uint32_t BootAddress0, uint32_t BootAddress1)
	Set Boot address.
static void	FLASH_OB_GetBootAdd (uint32_t *BootAddress0, uint32_t *BootAddress1)
	Get Boot address.
static void	FLASH_OB_SecureAreaConfig (uint32_t SecureAreaConfig, uint32_t SecureAreaStartAddr, uint32_t SecureAreaEndAddr, uint32_t Banks)
	Set secure area configuration.
static void	FLASH_OB_GetSecureArea (uint32_t *SecureAreaConfig, uint32_t *SecureAreaStartAddr, uint32_t *SecureAreaEndAddr, uint32_t Bank)
	Get secure area configuration.
static void	FLASH_CRC_AddSector (uint32_t Sector, uint32_t Bank)
	Add a CRC sector to the list of sectors on which the CRC will be calculated.
static void	FLASH_CRC_SelectAddress (uint32_t CRCStartAddr, uint32_t CRCEndAddr, uint32_t Bank)
	Select CRC start and end memory addresses on which the CRC will be calculated.
static void	FLASH_OB_CM4BootAddConfig (uint32_t BootOption, uint32_t BootAddress0, uint32_t BootAddress1)
	Set CM4 Boot address.
static void	FLASH_OB_GetCM4BootAdd (uint32_t *BootAddress0, uint32_t *BootAddress1)
	Get CM4 Boot address.
static void	FLASH_OB_OTP_LockConfig (uint32_t OTP_Block)
	Configure the OTP Block Lock.
static uint32_t	FLASH_OB_OTP_GetLock (void)
	Get the OTP Block Lock.
static void	FLASH_OB_SharedRAM_Config (uint32_t SharedRamConfig)
	Configure the TCM / AXI Shared RAM.
static uint32_t	FLASH_OB_SharedRAM_GetConfig (void)
	Get the TCM / AXI Shared RAM configurtion.
static void	FLASH_OB_CPUFreq_BoostConfig (uint32_t FreqBoost)
	Configure the CPU Frequency Boost.
static uint32_t	FLASH_OB_CPUFreq_GetBoost (void)
	Get the CPU Frequency Boost state.
void	FLASH_Erase_Sector (uint32_t Sector, uint32_t Banks, uint32_t VoltageRange)
	Erase the specified FLASH memory sector.

Detailed Description

Function Documentation

FLASH_CRC_AddSector()

static void FLASH_CRC_AddSector ( uint32_t  Sector, uint32_t  Bank  )

static

Add a CRC sector to the list of sectors on which the CRC will be calculated.

Parameters

Sector	Specifies the CRC sector number
Bank	Specifies the Bank

Return values

None

Definition at line 1719 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_FLASH_SECTOR(Sector));
 
  if (Bank == FLASH_BANK_1)
  {
    /* Clear CRC sector */
    FLASH->CRCCR1 &= (~FLASH_CRCCR_CRC_SECT);
 
    /* Select CRC Sector and activate ADD_SECT bit */
    FLASH->CRCCR1 |= Sector | FLASH_CRCCR_ADD_SECT;
  }
#if defined (DUAL_BANK)
  else
  {
    /* Clear CRC sector */
    FLASH->CRCCR2 &= (~FLASH_CRCCR_CRC_SECT);
 
    /* Select CRC Sector and activate ADD_SECT bit */
    FLASH->CRCCR2 |= Sector | FLASH_CRCCR_ADD_SECT;
  }
#endif /* DUAL_BANK */
}

Referenced by HAL_FLASHEx_ComputeCRC().

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FLASH_CRC_SelectAddress()

static void FLASH_CRC_SelectAddress ( uint32_t  CRCStartAddr, uint32_t  CRCEndAddr, uint32_t  Bank  )

static

Select CRC start and end memory addresses on which the CRC will be calculated.

Parameters

CRCStartAddr	Specifies the CRC start address
CRCEndAddr	Specifies the CRC end address
Bank	Specifies the Bank

Return values

None

Definition at line 1751 of file stm32h7xx_hal_flash_ex.c.

{
  if (Bank == FLASH_BANK_1)
  {
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(CRCStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(CRCEndAddr));
 
    /* Write CRC Start and End addresses */
    FLASH->CRCSADD1 = CRCStartAddr;
    FLASH->CRCEADD1 = CRCEndAddr;
  }
#if defined (DUAL_BANK)
  else
  {
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(CRCStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(CRCEndAddr));
 
    /* Write CRC Start and End addresses */
    FLASH->CRCSADD2 = CRCStartAddr;
    FLASH->CRCEADD2 = CRCEndAddr;
  }
#endif /* DUAL_BANK */
}

Referenced by HAL_FLASHEx_ComputeCRC().

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FLASH_Erase_Sector() [1/2]

void FLASH_Erase_Sector	(	uint32_t	Sector,
		uint32_t	Banks,
		uint32_t	VoltageRange
	)

Erase the specified FLASH memory sector.

Parameters

Sector	FLASH sector to erase This parameter can be a value of FLASH Sectors
Banks	Banks to be erased This parameter can be one of the following values: FLASH_BANK_1: Bank1 to be erased FLASH_BANK_2: Bank2 to be erased FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
VoltageRange	The device program/erase parallelism. This parameter can be one of the following values: FLASH_VOLTAGE_RANGE_1 : Flash program/erase by 8 bits FLASH_VOLTAGE_RANGE_2 : Flash program/erase by 16 bits FLASH_VOLTAGE_RANGE_3 : Flash program/erase by 32 bits FLASH_VOLTAGE_RANGE_4 : Flash program/erase by 64 bits

Return values

None

Definition at line 933 of file stm32h7xx_hal_flash_ex.c.

{
  assert_param(IS_FLASH_SECTOR(Sector));
  assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks));
#if defined (FLASH_CR_PSIZE)
  assert_param(IS_VOLTAGERANGE(VoltageRange));
#else
  UNUSED(VoltageRange);
#endif /* FLASH_CR_PSIZE */
 
  if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
  {
#if defined (FLASH_CR_PSIZE)
    /* Reset Program/erase VoltageRange and Sector Number for Bank1 */
    FLASH->CR1 &= ~(FLASH_CR_PSIZE | FLASH_CR_SNB);
 
    FLASH->CR1 |= (FLASH_CR_SER | VoltageRange | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
#else
    /* Reset Sector Number for Bank1 */
    FLASH->CR1 &= ~(FLASH_CR_SNB);
 
    FLASH->CR1 |= (FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
#endif /* FLASH_CR_PSIZE */
  }
 
#if defined (DUAL_BANK)
  if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
  {
#if defined (FLASH_CR_PSIZE)
    /* Reset Program/erase VoltageRange and Sector Number for Bank2 */
    FLASH->CR2 &= ~(FLASH_CR_PSIZE | FLASH_CR_SNB);
 
    FLASH->CR2 |= (FLASH_CR_SER | VoltageRange  | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
#else
    /* Reset Sector Number for Bank2 */
    FLASH->CR2 &= ~(FLASH_CR_SNB);
 
    FLASH->CR2 |= (FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos) | FLASH_CR_START);
#endif /* FLASH_CR_PSIZE */
  }
#endif /* DUAL_BANK */
}

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FLASH_Erase_Sector() [2/2]

void FLASH_Erase_Sector	(	uint32_t	Sector,
		uint8_t	VoltageRange
	)

Erase the specified FLASH memory sector.

Parameters

Sector

FLASH sector to erase The value of this parameter depend on device used within the same series

VoltageRange

The device voltage range which defines the erase parallelism. This parameter can be one of the following values: FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, the operation will be done by byte (8-bit) FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, the operation will be done by half word (16-bit) FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, the operation will be done by word (32-bit) FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, the operation will be done by double word (64-bit)

Return values

None

Definition at line 637 of file stm32f4xx_hal_flash_ex.c.

{
  uint32_t tmp_psize = 0;
 
  /* Check the parameters */
  assert_param(IS_FLASH_SECTOR(Sector));
  assert_param(IS_VOLTAGERANGE(VoltageRange));
  
  if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  {
     tmp_psize = FLASH_PSIZE_BYTE;
  }
  else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  {
    tmp_psize = FLASH_PSIZE_HALF_WORD;
  }
  else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  {
    tmp_psize = FLASH_PSIZE_WORD;
  }
  else
  {
    tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  }
 
  /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  if(Sector > FLASH_SECTOR_11) 
  {
    Sector += 4;
  }
  /* If the previous operation is completed, proceed to erase the sector */
  CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  FLASH->CR |= tmp_psize;
  CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  FLASH->CR |= FLASH_CR_STRT;
}

Referenced by HAL_FLASH_IRQHandler(), HAL_FLASHEx_Erase(), and HAL_FLASHEx_Erase_IT().

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FLASH_FlushCaches()

void FLASH_FlushCaches

(

void

)

Flush the instruction and data caches.

Return values

None

Definition at line 370 of file stm32f4xx_hal_flash_ex.c.

{
  /* Flush instruction cache  */
  if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN))
  {
    /* Disable instruction cache  */
    __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
    /* Reset instruction cache */
    __HAL_FLASH_INSTRUCTION_CACHE_RESET();
    /* Enable instruction cache */
    __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
  }
  
  /* Flush data cache */
  if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN))
  {
    /* Disable data cache  */
    __HAL_FLASH_DATA_CACHE_DISABLE();
    /* Reset data cache */
    __HAL_FLASH_DATA_CACHE_RESET();
    /* Enable data cache */
    __HAL_FLASH_DATA_CACHE_ENABLE();
  }
}

Referenced by HAL_FLASH_IRQHandler(), and HAL_FLASHEx_Erase().

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FLASH_MassErase() [1/3]

static void FLASH_MassErase ( uint32_t  VoltageRange, uint32_t  Banks  )

static

Mass erase of FLASH memory.

Parameters

VoltageRange	The device program/erase parallelism. This parameter can be one of the following values: FLASH_VOLTAGE_RANGE_1 : Flash program/erase by 8 bits FLASH_VOLTAGE_RANGE_2 : Flash program/erase by 16 bits FLASH_VOLTAGE_RANGE_3 : Flash program/erase by 32 bits FLASH_VOLTAGE_RANGE_4 : Flash program/erase by 64 bits
Banks	Banks to be erased This parameter can be one of the following values: FLASH_BANK_1: Bank1 to be erased FLASH_BANK_2: Bank2 to be erased FLASH_BANK_BOTH: Bank1 and Bank2 to be erased

Return values

HAL

Status

Definition at line 856 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
#if defined (FLASH_CR_PSIZE)
  assert_param(IS_VOLTAGERANGE(VoltageRange));
#else
  UNUSED(VoltageRange);
#endif /* FLASH_CR_PSIZE */
  assert_param(IS_FLASH_BANK(Banks));
 
#if defined (DUAL_BANK)
  /* Flash Mass Erase */
  if((Banks & FLASH_BANK_BOTH) == FLASH_BANK_BOTH)
  {
#if defined (FLASH_CR_PSIZE)
    /* Reset Program/erase VoltageRange for Bank1 and Bank2 */
    FLASH->CR1 &= (~FLASH_CR_PSIZE);
    FLASH->CR2 &= (~FLASH_CR_PSIZE);
 
    /* Set voltage range */
    FLASH->CR1 |= VoltageRange;
    FLASH->CR2 |= VoltageRange;
#endif /* FLASH_CR_PSIZE */
 
    /* Set Mass Erase Bit */
    FLASH->OPTCR |= FLASH_OPTCR_MER;
  }
  else
#endif /* DUAL_BANK */
  {
    /* Proceed to erase Flash Bank  */
    if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
    {
#if defined (FLASH_CR_PSIZE)
      /* Set Program/erase VoltageRange for Bank1 */
      FLASH->CR1 &= (~FLASH_CR_PSIZE);
      FLASH->CR1 |=  VoltageRange;
#endif /* FLASH_CR_PSIZE */
 
      /* Erase Bank1 */
      FLASH->CR1 |= (FLASH_CR_BER | FLASH_CR_START);
    }
 
#if defined (DUAL_BANK)
    if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
    {
#if defined (FLASH_CR_PSIZE)
      /* Set Program/erase VoltageRange for Bank2 */
      FLASH->CR2 &= (~FLASH_CR_PSIZE);
      FLASH->CR2 |= VoltageRange;
#endif /* FLASH_CR_PSIZE */
 
      /* Erase Bank2 */
      FLASH->CR2 |= (FLASH_CR_BER | FLASH_CR_START);
    }
#endif /* DUAL_BANK */
  }
}

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FLASH_MassErase() [2/3]

static void FLASH_MassErase ( uint8_t  VoltageRange )

static

Full erase of FLASH memory sectors.

Parameters

VoltageRange

The device voltage range which defines the erase parallelism. This parameter can be one of the following values: VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, the operation will be done by byte (8-bit) VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, the operation will be done by half word (16-bit) VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, the operation will be done by word (32-bit) VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, the operation will be done by double word (64-bit)

Return values

HAL

Status

Definition at line 665 of file stm32f7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_VOLTAGERANGE(VoltageRange));
 
  /* if the previous operation is completed, proceed to erase all sectors */
  FLASH->CR &= CR_PSIZE_MASK;
  FLASH->CR |= FLASH_CR_MER;
  FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8);
  /* Data synchronous Barrier (DSB) Just after the write operation
     This will force the CPU to respect the sequence of instruction (no optimization).*/
  __DSB();
}

FLASH_MassErase() [3/3]

static void FLASH_MassErase ( uint8_t  VoltageRange, uint32_t  Banks  )

static

Full erase of FLASH memory sectors.

Mass erase of FLASH memory.

Parameters

VoltageRange

The device voltage range which defines the erase parallelism. This parameter can be one of the following values: FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, the operation will be done by byte (8-bit) FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, the operation will be done by half word (16-bit) FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, the operation will be done by word (32-bit) FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, the operation will be done by double word (64-bit)

Banks

Banks to be erased This parameter can be one of the following values: FLASH_BANK_1: Bank1 to be erased FLASH_BANK_2: Bank2 to be erased FLASH_BANK_BOTH: Bank1 and Bank2 to be erased

Return values

HAL

Status

Parameters

VoltageRange

The device voltage range which defines the erase parallelism. This parameter can be one of the following values: FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, the operation will be done by byte (8-bit) FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, the operation will be done by half word (16-bit) FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, the operation will be done by word (32-bit) FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, the operation will be done by double word (64-bit)

Banks

Banks to be erased This parameter can be one of the following values: FLASH_BANK_1: Bank1 to be erased

Return values

None

Definition at line 591 of file stm32f4xx_hal_flash_ex.c.

{
  uint32_t tmp_psize = 0;
  
  /* Check the parameters */
  assert_param(IS_VOLTAGERANGE(VoltageRange));
  assert_param(IS_FLASH_BANK(Banks));
 
  /* if the previous operation is completed, proceed to erase all sectors */
  CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  FLASH->CR |= tmp_psize;
  if(Banks == FLASH_BANK_BOTH)
  {
    /* bank1 & bank2 will be erased*/
    FLASH->CR |= FLASH_MER_BIT;
  }
  else if(Banks == FLASH_BANK_1)
  {
    /*Only bank1 will be erased*/
    FLASH->CR |= FLASH_CR_MER1;
  }
  else
  {
    /*Only bank2 will be erased*/
    FLASH->CR |= FLASH_CR_MER2;
  }
  FLASH->CR |= FLASH_CR_STRT;
}

Referenced by HAL_FLASHEx_Erase(), and HAL_FLASHEx_Erase_IT().

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FLASH_OB_BootAddConfig()

static void FLASH_OB_BootAddConfig ( uint32_t  BootOption, uint32_t  BootAddress0, uint32_t  BootAddress1  )

static

Set Boot address.

Parameters

BootOption	Boot address option byte to be programmed, This parameter must be a value of FLASHEx OB BOOT OPTION (OB_BOOT_ADD0, OB_BOOT_ADD1 or OB_BOOT_ADD_BOTH)
BootAddress0	Specifies the Boot Address 0
BootAddress1	Specifies the Boot Address 1

Return values

HAL

Status

Definition at line 1522 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_BOOT_ADD_OPTION(BootOption));
 
  if((BootOption & OB_BOOT_ADD0) == OB_BOOT_ADD0)
  {
    /* Check the parameters */
    assert_param(IS_BOOT_ADDRESS(BootAddress0));
 
    /* Configure CM7 BOOT ADD0 */
#if defined(DUAL_CORE)
    MODIFY_REG(FLASH->BOOT7_PRG, FLASH_BOOT7_BCM7_ADD0, (BootAddress0 >> 16));
#else /* Single Core*/
    MODIFY_REG(FLASH->BOOT_PRG, FLASH_BOOT_ADD0, (BootAddress0 >> 16));
#endif /* DUAL_CORE */
  }
 
  if((BootOption & OB_BOOT_ADD1) == OB_BOOT_ADD1)
  {
    /* Check the parameters */
    assert_param(IS_BOOT_ADDRESS(BootAddress1));
 
    /* Configure CM7 BOOT ADD1 */
#if defined(DUAL_CORE)
    MODIFY_REG(FLASH->BOOT7_PRG, FLASH_BOOT7_BCM7_ADD1, BootAddress1);
#else /* Single Core*/
    MODIFY_REG(FLASH->BOOT_PRG, FLASH_BOOT_ADD1, BootAddress1);
#endif /* DUAL_CORE */
  }
}

FLASH_OB_BootAddressConfig()

static HAL_StatusTypeDef FLASH_OB_BootAddressConfig ( uint32_t  BootOption, uint32_t  Address  )

static

Configure Boot base address.

Parameters

BootOption

: specifies Boot base address depending from Boot pin = 0 or pin = 1 This parameter can be one of the following values: OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1

Address

specifies Boot base address This parameter can be one of the following values: OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000)

Return values

HAL

Status

Definition at line 958 of file stm32f7xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_BOOT_ADDRESS(Address));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  
  if(status == HAL_OK)
  {
    if(BootOption == OPTIONBYTE_BOOTADDR_0)
    {           
      MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD0, Address);
    }
    else
    {
      MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD1, (Address << 16));
    }
  }
  
  return status;
}

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FLASH_OB_BootConfig()

static HAL_StatusTypeDef FLASH_OB_BootConfig ( uint8_t  BootConfig )

static

Configure the Dual Bank Boot.

Note

This function can be used only for STM32F42xxx/43xxx devices.

Parameters

BootConfig

specifies the Dual Bank Boot Option byte. This parameter can be one of the following values: OB_Dual_BootEnabled: Dual Bank Boot Enable OB_Dual_BootDisabled: Dual Bank Boot Disabled

Return values

None

Definition at line 829 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
 
  /* Check the parameters */
  assert_param(IS_OB_BOOT(BootConfig));
 
  /* Wait for last operation to be completed */  
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    /* Set Dual Bank Boot */
    *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
    *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  }
  
  return status;
}

Referenced by HAL_FLASHEx_AdvOBProgram().

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FLASH_OB_BOR_LevelConfig() [1/2]

static void FLASH_OB_BOR_LevelConfig ( uint32_t  Level )

static

Set the BOR Level.

Parameters

Level

specifies the Option Bytes BOR Reset Level. This parameter can be one of the following values: OB_BOR_LEVEL0: Reset level threshold is set to 1.6V OB_BOR_LEVEL1: Reset level threshold is set to 2.1V OB_BOR_LEVEL2: Reset level threshold is set to 2.4V OB_BOR_LEVEL3: Reset level threshold is set to 2.7V

Return values

None

Definition at line 1490 of file stm32h7xx_hal_flash_ex.c.

{
  assert_param(IS_OB_BOR_LEVEL(Level));
 
  /* Configure BOR_LEV option byte */
  MODIFY_REG(FLASH->OPTSR_PRG, FLASH_OPTSR_BOR_LEV, Level);
}

FLASH_OB_BOR_LevelConfig() [2/2]

static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig ( uint8_t  Level )

static

Set the BOR Level.

Parameters

Level

specifies the Option Bytes BOR Reset Level. This parameter can be one of the following values: OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V

Return values

HAL

Status

Definition at line 1287 of file stm32f4xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_BOR_LEVEL(Level));
 
  /* Set the BOR Level */
  *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  
  return HAL_OK;
  
}

Referenced by HAL_FLASHEx_OBProgram().

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FLASH_OB_CM4BootAddConfig()

static void FLASH_OB_CM4BootAddConfig ( uint32_t  BootOption, uint32_t  BootAddress0, uint32_t  BootAddress1  )

static

Set CM4 Boot address.

Parameters

BootOption	Boot address option byte to be programmed, This parameter must be a value of FLASHEx OB BOOT OPTION (OB_BOOT_ADD0, OB_BOOT_ADD1 or OB_BOOT_ADD_BOTH)
BootAddress0	Specifies the CM4 Boot Address 0.
BootAddress1	Specifies the CM4 Boot Address 1.

Return values

HAL

Status

Definition at line 1588 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_BOOT_ADD_OPTION(BootOption));
 
  if((BootOption & OB_BOOT_ADD0) == OB_BOOT_ADD0)
  {
    /* Check the parameters */
    assert_param(IS_BOOT_ADDRESS(BootAddress0));
 
    /* Configure CM4 BOOT ADD0 */
    MODIFY_REG(FLASH->BOOT4_PRG, FLASH_BOOT4_BCM4_ADD0, (BootAddress0 >> 16));
 
  }
 
  if((BootOption & OB_BOOT_ADD1) == OB_BOOT_ADD1)
  {
    /* Check the parameters */
    assert_param(IS_BOOT_ADDRESS(BootAddress1));
 
    /* Configure CM4 BOOT ADD1 */
    MODIFY_REG(FLASH->BOOT4_PRG, FLASH_BOOT4_BCM4_ADD1, BootAddress1);
  }
}

FLASH_OB_CPUFreq_BoostConfig()

static void FLASH_OB_CPUFreq_BoostConfig ( uint32_t  FreqBoost )

static

Configure the CPU Frequency Boost.

Parameters

FreqBoost

specifies the CPU Frequency Boost state. This parameter can be a value of FLASHEx OB CPUFREQ BOOST

Return values

None

Definition at line 1839 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_USER_CPUFREQ_BOOST(FreqBoost));
 
  /* Configure the CPU Frequency Boost in the option bytes register */
  MODIFY_REG(FLASH->OPTSR2_PRG, FLASH_OPTSR2_CPUFREQ_BOOST, FreqBoost);
}

FLASH_OB_CPUFreq_GetBoost()

static uint32_t FLASH_OB_CPUFreq_GetBoost ( void  )

static

Get the CPU Frequency Boost state.

Return values

FreqBoost

returns the CPU Frequency Boost state. This return value can be a value of FLASHEx OB CPUFREQ BOOST

Definition at line 1853 of file stm32h7xx_hal_flash_ex.c.

{
  return (FLASH->OPTSR2_CUR & FLASH_OPTSR2_CPUFREQ_BOOST);;
}

FLASH_OB_DisablePCROP() [1/2]

static HAL_StatusTypeDef FLASH_OB_DisablePCROP ( uint32_t  Sector )

static

Disable the read/write protection (PCROP) of the desired sectors.

Note

This function can be used only for STM32F401xx devices.

Parameters

Sector

specifies the sector(s) to be read/write protected or unprotected. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 OB_PCROP_Sector_All

Return values

HAL

Status

Definition at line 1186 of file stm32f4xx_hal_flash_ex.c.

{  
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_PCROP(Sector));
    
  /* Wait for last operation to be completed */  
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
  }
  
  return status;
 
}

Referenced by HAL_FLASHEx_AdvOBProgram().

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FLASH_OB_DisablePCROP() [2/2]

static HAL_StatusTypeDef FLASH_OB_DisablePCROP ( uint32_t  SectorBank1, uint32_t  SectorBank2, uint32_t  Banks  )

static

Disable the read/write protection (PCROP) of the desired sectors of Bank 1 and/or Bank 2.

Note

This function can be used only for STM32F42xxx/43xxx devices.

Parameters

SectorBank1	specifies the sector(s) to be read/write protected or unprotected for bank1. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 OB_PCROP_SECTOR__All
SectorBank2	Specifies the sector(s) to be read/write protected or unprotected for bank2. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 OB_PCROP_SECTOR__All
Banks	Disable PCROP protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: WRP on all sectors of bank1 FLASH_BANK_2: WRP on all sectors of bank2 FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2

Return values

HAL

Status

Definition at line 933 of file stm32f4xx_hal_flash_ex.c.

{  
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
    {
      assert_param(IS_OB_PCROP(SectorBank1));
      /*Write protection done on sectors of BANK1*/
      *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1); 
    }
    else 
    {
      /*Write protection done on sectors of BANK2*/
      assert_param(IS_OB_PCROP(SectorBank2));
      *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); 
    }
 
    /*Write protection on all sector  of BANK2*/
    if(Banks == FLASH_BANK_BOTH)
    {
      assert_param(IS_OB_PCROP(SectorBank2));
     /* Wait for last operation to be completed */
      status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
      
      if(status == HAL_OK)
      { 
        /*Write protection done on sectors of BANK2*/
        *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); 
      }
    }
    
  }
  
  return status;
 
}

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FLASH_OB_DisableWRP() [1/2]

static HAL_StatusTypeDef FLASH_OB_DisableWRP ( uint32_t  WRPSector )

static

Disable the write protection of the desired bank1 or bank 2 sectors.

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM4
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Parameters

WRPSector

specifies the sector(s) to be write protected. This parameter can be one of the following values: WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices) or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices) or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode for STM32F76xxx/STM32F77xxx devices) OB_WRP_Sector_All

Return values

HAL

Status

Definition at line 868 of file stm32f7xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_WRP_SECTOR(WRPSector));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    /* Write protection disabled on sectors */
    FLASH->OPTCR |= (WRPSector); 
  }
 
  return status;
}

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FLASH_OB_DisableWRP() [2/2]

static void FLASH_OB_DisableWRP ( uint32_t  WRPSector, uint32_t  Banks  )

static

Disable the write protection of the desired bank1 or bank 2 sectors.

Disable the write protection of the desired bank 1 sectors.

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM4
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).

Parameters

WRPSector

specifies the sector(s) to be write protected. This parameter can be one of the following values: WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 OB_WRP_Sector_All

Note

BANK2 starts from OB_WRP_SECTOR_12

Parameters

Banks

Disable write protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: Bank1 to be erased FLASH_BANK_2: Bank2 to be erased FLASH_BANK_BOTH: Bank1 and Bank2 to be erased

Return values

HAL

Status

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM4
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).

Parameters

WRPSector	specifies the sector(s) to be write protected. The value of this parameter depend on device used within the same series
Banks	Enable write protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: WRP on all sectors of bank1

Return values

HAL

Status

Parameters

WRPSector	specifies the sector(s) to disable write protection. This parameter can be one of the following values: WRPSector: A combination of FLASH_OB_WRP_SECTOR_0 to FLASH_OB_WRP_SECTOR_7 or FLASH_OB_WRP_SECTOR_All
Banks	the specific bank to apply WRP sectors This parameter can be one of the following values: FLASH_BANK_1: disable WRP on specified bank1 sectors FLASH_BANK_2: disable WRP on specified bank2 sectors FLASH_BANK_BOTH: disable WRP on both bank1 and bank2 specified sectors

Return values

HAL	FLASH State

Definition at line 768 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_WRP_SECTOR(WRPSector));
  assert_param(IS_FLASH_BANK(Banks));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
         (WRPSector < OB_WRP_SECTOR_12))
    {
       if(WRPSector == OB_WRP_SECTOR_All)
       {
          /*Write protection on all sector of BANK1*/
          *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
       }
       else
       {
          /*Write protection done on sectors of BANK1*/
          *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; 
       }
    }
    else 
    {
      /*Write protection done on sectors of BANK2*/
      *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
    }
 
    /*Write protection on all sector  of BANK2*/
    if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
    {
      /* Wait for last operation to be completed */
      status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
      
      if(status == HAL_OK)
      { 
        *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
      }
    }
    
  }
 
  return status;
}

Referenced by HAL_FLASHEx_OBProgram().

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FLASH_OB_EnablePCROP() [1/2]

static HAL_StatusTypeDef FLASH_OB_EnablePCROP ( uint32_t  Sector )

static

Enable the read/write protection (PCROP) of the desired sectors.

Note

This function can be used only for STM32F401xx devices.

Parameters

Sector

specifies the sector(s) to be read/write protected or unprotected. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 OB_PCROP_Sector_All

Return values

HAL

Status

Definition at line 1158 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_PCROP(Sector));
    
  /* Wait for last operation to be completed */  
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  }
  
  return status;
}

Referenced by HAL_FLASHEx_AdvOBProgram().

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FLASH_OB_EnablePCROP() [2/2]

static HAL_StatusTypeDef FLASH_OB_EnablePCROP ( uint32_t  SectorBank1, uint32_t  SectorBank2, uint32_t  Banks  )

static

Enable the read/write protection (PCROP) of the desired sectors of Bank 1 and/or Bank 2.

Note

This function can be used only for STM32F42xxx/43xxx devices.

Parameters

SectorBank1	Specifies the sector(s) to be read/write protected or unprotected for bank1. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 OB_PCROP_SECTOR__All
SectorBank2	Specifies the sector(s) to be read/write protected or unprotected for bank2. This parameter can be one of the following values: OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 OB_PCROP_SECTOR__All
Banks	Enable PCROP protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: WRP on all sectors of bank1 FLASH_BANK_2: WRP on all sectors of bank2 FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2

Return values

HAL

Status

Definition at line 869 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  assert_param(IS_FLASH_BANK(Banks));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
    {
      assert_param(IS_OB_PCROP(SectorBank1));
      /*Write protection done on sectors of BANK1*/
      *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1; 
    }
    else 
    {
      assert_param(IS_OB_PCROP(SectorBank2));
      /*Write protection done on sectors of BANK2*/
      *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; 
    }
 
    /*Write protection on all sector  of BANK2*/
    if(Banks == FLASH_BANK_BOTH)
    {
      assert_param(IS_OB_PCROP(SectorBank2));
      /* Wait for last operation to be completed */
      status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
      
      if(status == HAL_OK)
      { 
        /*Write protection done on sectors of BANK2*/
        *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; 
      }
    }
    
  }
 
  return status;
}

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FLASH_OB_EnableWRP() [1/2]

static HAL_StatusTypeDef FLASH_OB_EnableWRP ( uint32_t  WRPSector )

static

Enable the write protection of the desired bank1 or bank2 sectors.

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM7
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Parameters

WRPSector

specifies the sector(s) to be write protected. This parameter can be one of the following values: WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices) or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices) or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode for STM32F76xxx/STM32F77xxx devices) OB_WRP_SECTOR_All

Return values

HAL	FLASH State

Definition at line 832 of file stm32f7xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_WRP_SECTOR(WRPSector));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    /*Write protection enabled on sectors */
    FLASH->OPTCR &= (~WRPSector);  
  }
  
  return status;
}

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FLASH_OB_EnableWRP() [2/2]

static void FLASH_OB_EnableWRP ( uint32_t  WRPSector, uint32_t  Banks  )

static

Enable the write protection of the desired bank1 or bank 2 sectors.

Enable the write protection of the desired bank 1 sectors.

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM4
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).

Parameters

WRPSector

specifies the sector(s) to be write protected. This parameter can be one of the following values: WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 OB_WRP_SECTOR_All

Note

BANK2 starts from OB_WRP_SECTOR_12

Parameters

Banks

Enable write protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: WRP on all sectors of bank1 FLASH_BANK_2: WRP on all sectors of bank2 FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2

Return values

HAL	FLASH State

Note

When the memory read protection level is selected (RDP level = 1), it is not possible to program or erase the flash sector i if CortexM4
debug features are connected or boot code is executed in RAM, even if nWRPi = 1

Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).

Parameters

WRPSector	specifies the sector(s) to be write protected. The value of this parameter depend on device used within the same series
Banks	Enable write protection on all the sectors for the specific bank This parameter can be one of the following values: FLASH_BANK_1: WRP on all sectors of bank1

Return values

HAL

Status

Parameters

WRPSector	specifies the sector(s) to be write protected. This parameter can be one of the following values: WRPSector: A combination of OB_WRP_SECTOR_0 to OB_WRP_SECTOR_7 or OB_WRP_SECTOR_All
Banks	the specific bank to apply WRP sectors This parameter can be one of the following values: FLASH_BANK_1: enable WRP on specified bank1 sectors FLASH_BANK_2: enable WRP on specified bank2 sectors FLASH_BANK_BOTH: enable WRP on both bank1 and bank2 specified sectors

Return values

HAL	FLASH State

Definition at line 697 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_WRP_SECTOR(WRPSector));
  assert_param(IS_FLASH_BANK(Banks));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  {
    if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
         (WRPSector < OB_WRP_SECTOR_12))
    {
       if(WRPSector == OB_WRP_SECTOR_All)
       {
          /*Write protection on all sector of BANK1*/
          *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));  
       }
       else
       {
          /*Write protection done on sectors of BANK1*/
          *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);  
       }
    }
    else 
    {
      /*Write protection done on sectors of BANK2*/
      *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));  
    }
 
    /*Write protection on all sector of BANK2*/
    if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
    {
      /* Wait for last operation to be completed */
      status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
      
      if(status == HAL_OK)
      { 
        *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));  
      }
    }
    
  }
  return status;
}

Referenced by HAL_FLASHEx_OBProgram().

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FLASH_OB_GetBootAdd()

static void FLASH_OB_GetBootAdd ( uint32_t *  BootAddress0, uint32_t *  BootAddress1  )

static

Get Boot address.

Parameters

BootAddress0	Specifies the Boot Address 0.
BootAddress1	Specifies the Boot Address 1.

Return values

HAL

Status

Definition at line 1560 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t regvalue;
 
#if defined(DUAL_CORE)
  regvalue = FLASH->BOOT7_CUR;
 
  (*BootAddress0) = (regvalue & FLASH_BOOT7_BCM7_ADD0) << 16;
  (*BootAddress1) = (regvalue & FLASH_BOOT7_BCM7_ADD1);
#else /* Single Core */
  regvalue = FLASH->BOOT_CUR;
 
  (*BootAddress0) = (regvalue & FLASH_BOOT_ADD0) << 16;
  (*BootAddress1) = (regvalue & FLASH_BOOT_ADD1);
#endif /* DUAL_CORE */
}

FLASH_OB_GetBootAddress()

static uint32_t FLASH_OB_GetBootAddress ( uint32_t  BootOption )

static

Configure Boot base address.

Parameters

BootOption

: specifies Boot base address depending from Boot pin = 0 or pin = 1 This parameter can be one of the following values: OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1

Return values

uint32_t

Boot Base Address: OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000)

Definition at line 1042 of file stm32f7xx_hal_flash_ex.c.

{  
  uint32_t Address = 0;
    
    /* Return the Boot base Address */
  if(BootOption == OPTIONBYTE_BOOTADDR_0)
  {         
    Address = FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD0;
    }
  else
    {
        Address = ((FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD1) >> 16);
    }
 
  return Address;
}

FLASH_OB_GetBOR()

static uint32_t FLASH_OB_GetBOR ( void  )

static

Returns the FLASH BOR level.

Get the BOR Level.

Return values

uint8_t	The FLASH BOR level: OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
The	Option Bytes BOR Reset Level. This parameter can be one of the following values: OB_BOR_LEVEL0: Reset level threshold is set to 1.6V OB_BOR_LEVEL1: Reset level threshold is set to 2.1V OB_BOR_LEVEL2: Reset level threshold is set to 2.4V OB_BOR_LEVEL3: Reset level threshold is set to 2.7V

Definition at line 1357 of file stm32f4xx_hal_flash_ex.c.

{
  /* Return the FLASH BOR level */
  return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
}

Referenced by HAL_FLASHEx_OBGetConfig().

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FLASH_OB_GetCM4BootAdd()

static void FLASH_OB_GetCM4BootAdd ( uint32_t *  BootAddress0, uint32_t *  BootAddress1  )

static

Get CM4 Boot address.

Parameters

BootAddress0	Specifies the CM4 Boot Address 0.
BootAddress1	Specifies the CM4 Boot Address 1.

Return values

HAL

Status

Definition at line 1619 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t regvalue;
 
  regvalue = FLASH->BOOT4_CUR;
 
  (*BootAddress0) = (regvalue & FLASH_BOOT4_BCM4_ADD0) << 16;
  (*BootAddress1) = (regvalue & FLASH_BOOT4_BCM4_ADD1);
}

FLASH_OB_GetPCROP() [1/2]

static void FLASH_OB_GetPCROP ( uint32_t *  PCROPConfig, uint32_t *  PCROPStartAddr, uint32_t *  PCROPEndAddr, uint32_t  Bank  )

static

Get the Proprietary code readout protection configuration on a given Bank.

Parameters

PCROPConfig	indicates if the PCROP area for the given Bank shall be erased or not when RDP level decreased from Level 1 to Level 0 or after a bank erase with protection removal
PCROPStartAddr	gives the start address of the Proprietary code readout protection of the bank
PCROPEndAddr	gives the end address of the Proprietary code readout protection of the bank
Bank	the specific bank to apply PCROP protection This parameter can be exclusively one of the following values: FLASH_BANK_1: PCROP on specified bank1 area FLASH_BANK_2: PCROP on specified bank2 area FLASH_BANK_BOTH: is not allowed here

Return values

None

Definition at line 1454 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t regvalue = 0;
  uint32_t bankBase = 0;
 
  if(Bank == FLASH_BANK_1)
  {
    regvalue = FLASH->PRAR_CUR1;
    bankBase = FLASH_BANK1_BASE;
  }
 
#if defined (DUAL_BANK)
  if(Bank == FLASH_BANK_2)
  {
    regvalue = FLASH->PRAR_CUR2;
    bankBase = FLASH_BANK2_BASE;
  }
#endif /* DUAL_BANK */
 
  (*PCROPConfig) =  (regvalue & FLASH_PRAR_DMEP);
 
  (*PCROPStartAddr) = ((regvalue & FLASH_PRAR_PROT_AREA_START) << 8) + bankBase;
  (*PCROPEndAddr) = (regvalue & FLASH_PRAR_PROT_AREA_END) >> FLASH_PRAR_PROT_AREA_END_Pos;
  (*PCROPEndAddr) = ((*PCROPEndAddr) << 8) + bankBase;
}

FLASH_OB_GetPCROP() [2/2]

static uint32_t FLASH_OB_GetPCROP ( void  )

static

Return the FLASH PCROP Protection Option Bytes value.

Return values

uint32_t

FLASH PCROP Protection Option Bytes value

Definition at line 1115 of file stm32f7xx_hal_flash_ex.c.

{
  /* Return the FLASH write protection Register value */
  return ((uint32_t)(FLASH->OPTCR2 & FLASH_OPTCR2_PCROP));
}

FLASH_OB_GetPCROPRDP()

static uint32_t FLASH_OB_GetPCROPRDP ( void  )

static

Return the FLASH PCROP_RDP option byte value.

Return values

uint32_t

FLASH PCROP_RDP option byte value

Definition at line 1125 of file stm32f7xx_hal_flash_ex.c.

{
  /* Return the FLASH write protection Register value */
  return ((uint32_t)(FLASH->OPTCR2 & FLASH_OPTCR2_PCROP_RDP));
}

FLASH_OB_GetRDP()

static uint32_t FLASH_OB_GetRDP ( void  )

static

Returns the FLASH Read Protection level.

Get the read protection level.

Return values

FLASH	ReadOut Protection Status: This parameter can be one of the following values: OB_RDP_LEVEL_0: No protection OB_RDP_LEVEL_1: Read protection of the memory OB_RDP_LEVEL_2: Full chip protection
RDPLevel	specifies the read protection level. This return value can be one of the following values: OB_RDP_LEVEL_0: No protection OB_RDP_LEVEL_1: Read protection of the memory OB_RDP_LEVEL_2: Full chip protection

Definition at line 1329 of file stm32f4xx_hal_flash_ex.c.

{
  uint8_t readstatus = OB_RDP_LEVEL_0;
 
  if (*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
  {
    readstatus = OB_RDP_LEVEL_2;
  }
  else if (*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
  {
    readstatus = OB_RDP_LEVEL_1;
  }
  else 
  {
    readstatus = OB_RDP_LEVEL_0;
  }
 
  return readstatus;
}

Referenced by HAL_FLASHEx_OBGetConfig().

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FLASH_OB_GetSecureArea()

static void FLASH_OB_GetSecureArea ( uint32_t *  SecureAreaConfig, uint32_t *  SecureAreaStartAddr, uint32_t *  SecureAreaEndAddr, uint32_t  Bank  )

static

Get secure area configuration.

Parameters

SecureAreaConfig	indicates if the secure area will be deleted or not when RDP level decreased from Level 1 to Level 0 or during a mass erase.
SecureAreaStartAddr	gives the secure area start address
SecureAreaEndAddr	gives the secure area end address
Bank	Specifies the Bank

Return values

None

Definition at line 1686 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t regvalue = 0;
  uint32_t bankBase = 0;
 
  /* Check Bank parameter value */
  if(Bank == FLASH_BANK_1)
  {
    regvalue = FLASH->SCAR_CUR1;
    bankBase = FLASH_BANK1_BASE;
  }
 
#if defined (DUAL_BANK)
  if(Bank == FLASH_BANK_2)
  {
    regvalue = FLASH->SCAR_CUR2;
    bankBase = FLASH_BANK2_BASE;
  }
#endif /* DUAL_BANK */
 
  /* Get the secure area settings */
  (*SecureAreaConfig) = (regvalue & FLASH_SCAR_DMES);
  (*SecureAreaStartAddr) = ((regvalue & FLASH_SCAR_SEC_AREA_START) << 8) + bankBase;
  (*SecureAreaEndAddr) = (regvalue & FLASH_SCAR_SEC_AREA_END) >> FLASH_SCAR_SEC_AREA_END_Pos;
  (*SecureAreaEndAddr) = ((*SecureAreaEndAddr) << 8) + bankBase;
}

FLASH_OB_GetUser()

static uint32_t FLASH_OB_GetUser ( void  )

static

Return the FLASH User Option Byte value.

Return values

uint8_t	FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) and RST_STDBY(Bit2).
The	FLASH User Option Bytes values IWDG1_SW(Bit4), IWDG2_SW(Bit 5), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7), FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]), SECURITY(Bit 21), BCM4(Bit 22), BCM7(Bit 23), nRST_STOP_D2(Bit 24), nRST_STDY_D2(Bit 25), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).

Return the FLASH User Option Byte value.

Return values

The	FLASH User Option Bytes values IWDG_SW(Bit4), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7), FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]), SECURITY(Bit 21), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).

Definition at line 1305 of file stm32f4xx_hal_flash_ex.c.

{
  /* Return the User Option Byte */
  return ((uint8_t)(FLASH->OPTCR & 0xE0));
}

Referenced by HAL_FLASHEx_OBGetConfig().

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FLASH_OB_GetWRP() [1/2]

static void FLASH_OB_GetWRP ( uint32_t *  WRPState, uint32_t *  WRPSector, uint32_t  Bank  )

static

Get the write protection of the given bank 1 or bank 2 sectors.

Parameters

WRPState	gives the write protection state on the given bank. This parameter can be one of the following values: WRPState: OB_WRPSTATE_DISABLE or OB_WRPSTATE_ENABLE
WRPSector	gives the write protected sector(s) on the given bank . This parameter can be one of the following values: WRPSector: A combination of FLASH_OB_WRP_SECTOR_0 to FLASH_OB_WRP_SECTOR_7 or FLASH_OB_WRP_SECTOR_All
Bank	the specific bank to apply WRP sectors This parameter can be exclusively one of the following values: FLASH_BANK_1: Get bank1 WRP sectors FLASH_BANK_2: Get bank2 WRP sectors FLASH_BANK_BOTH: note allowed in this functions

Return values

HAL	FLASH State

Definition at line 1064 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t regvalue = 0U;
 
  if(Bank == FLASH_BANK_1)
  {
    regvalue = FLASH->WPSN_CUR1;
  }
 
#if defined (DUAL_BANK)
  if(Bank == FLASH_BANK_2)
  {
    regvalue = FLASH->WPSN_CUR2;
  }
#endif /* DUAL_BANK */
 
  (*WRPSector) = (~regvalue) & FLASH_WPSN_WRPSN;
 
  if(*WRPSector == 0U)
  {
    (*WRPState) = OB_WRPSTATE_DISABLE;
  }
  else
  {
    (*WRPState) = OB_WRPSTATE_ENABLE;
  }
}

FLASH_OB_GetWRP() [2/2]

static uint16_t FLASH_OB_GetWRP ( void  )

static

Return the FLASH Write Protection Option Bytes value.

Return values

uint16_t

FLASH Write Protection Option Bytes value

Definition at line 1315 of file stm32f4xx_hal_flash_ex.c.

{
  /* Return the FLASH write protection Register value */
  return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
}

Referenced by HAL_FLASHEx_OBGetConfig().

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FLASH_OB_OTP_GetLock()

static uint32_t FLASH_OB_OTP_GetLock ( void  )

static

Get the OTP Block Lock.

Return values

OTP_Block

specifies the OTP Block to lock. This return value can be a value of FLASH OTP blocks

Definition at line 1799 of file stm32h7xx_hal_flash_ex.c.

{
  return (FLASH->OTPBL_CUR);
}

FLASH_OB_OTP_LockConfig()

static void FLASH_OB_OTP_LockConfig ( uint32_t  OTP_Block )

static

Configure the OTP Block Lock.

Parameters

OTP_Block

specifies the OTP Block to lock. This parameter can be a value of FLASH OTP blocks

Return values

None

Definition at line 1785 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OTP_BLOCK(OTP_Block));
 
  /* Configure the OTP Block lock in the option bytes register */
  FLASH->OTPBL_PRG |= (OTP_Block & FLASH_OTPBL_LOCKBL);
}

FLASH_OB_PCROP_Config()

static HAL_StatusTypeDef FLASH_OB_PCROP_Config ( uint32_t  PCROPSector )

static

Set the PCROP protection for sectors.

Parameters

PCROPSector

specifies the sector(s) to be PCROP protected. This parameter can be one of the following values: OB_PCROP_SECTOR_x: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_7 OB_PCROP_SECTOR_ALL

Return values

HAL

Status

Definition at line 1069 of file stm32f7xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_PCROP_SECTOR(PCROPSector));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    MODIFY_REG(FLASH->OPTCR2, FLASH_OPTCR2_PCROP, PCROPSector);
  }
  
  return status;
}

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FLASH_OB_PCROP_RDP_Config()

static HAL_StatusTypeDef FLASH_OB_PCROP_RDP_Config ( uint32_t  Pcrop_Rdp )

static

Set the PCROP_RDP value.

Parameters

Pcrop_Rdp

specifies the PCROP_RDP bit value.

Return values

HAL

Status

Definition at line 1093 of file stm32f7xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_PCROP_RDP_VALUE(Pcrop_Rdp));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    MODIFY_REG(FLASH->OPTCR2, FLASH_OPTCR2_PCROP_RDP, Pcrop_Rdp);
  }
  
  return status;
}

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FLASH_OB_PCROPConfig()

static void FLASH_OB_PCROPConfig ( uint32_t  PCROPConfig, uint32_t  PCROPStartAddr, uint32_t  PCROPEndAddr, uint32_t  Banks  )

static

Configure the Proprietary code readout protection of the desired addresses.

Note

To configure the PCROP options, the option lock bit OPTLOCK must be cleared with the call of the HAL_FLASH_OB_Unlock() function.

To validate the PCROP options, the option bytes must be reloaded through the call of the HAL_FLASH_OB_Launch() function.

Parameters

PCROPConfig	specifies if the PCROP area for the given Bank shall be erased or not when RDP level decreased from Level 1 to Level 0, or after a bank erase with protection removal This parameter must be a value of FLASHEx_OB_PCROP_RDP enumeration
PCROPStartAddr	specifies the start address of the Proprietary code readout protection This parameter can be an address between begin and end of the bank
PCROPEndAddr	specifies the end address of the Proprietary code readout protection This parameter can be an address between PCROPStartAddr and end of the bank
Banks	the specific bank to apply PCROP protection This parameter can be one of the following values: FLASH_BANK_1: PCROP on specified bank1 area FLASH_BANK_2: PCROP on specified bank2 area FLASH_BANK_BOTH: PCROP on specified bank1 and bank2 area (same config will be applied on both banks)

Return values

None

Definition at line 1405 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));
  assert_param(IS_OB_PCROP_RDP(PCROPConfig));
 
  if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
  {
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(PCROPStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(PCROPEndAddr));
 
    /* Configure the Proprietary code readout protection */
    FLASH->PRAR_PRG1 = ((PCROPStartAddr - FLASH_BANK1_BASE) >> 8)                                 | \
                       (((PCROPEndAddr - FLASH_BANK1_BASE) >> 8) << FLASH_PRAR_PROT_AREA_END_Pos) | \
                       PCROPConfig;
  }
 
#if defined (DUAL_BANK)
  if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
  {
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(PCROPStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(PCROPEndAddr));
 
    /* Configure the Proprietary code readout protection */
    FLASH->PRAR_PRG2 = ((PCROPStartAddr - FLASH_BANK2_BASE) >> 8)                                 | \
                       (((PCROPEndAddr - FLASH_BANK2_BASE) >> 8) << FLASH_PRAR_PROT_AREA_END_Pos) | \
                       PCROPConfig;
  }
#endif /* DUAL_BANK */
}

FLASH_OB_RDP_LevelConfig()

static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig ( uint8_t  Level )

static

Set the read protection level.

Parameters

Level

specifies the read protection level. This parameter can be one of the following values: OB_RDP_LEVEL_0: No protection OB_RDP_LEVEL_1: Read protection of the memory OB_RDP_LEVEL_2: Full chip protection

Note

WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0

Return values

HAL

Status

Definition at line 1218 of file stm32f4xx_hal_flash_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  
  /* Check the parameters */
  assert_param(IS_OB_RDP_LEVEL(Level));
    
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 
  if(status == HAL_OK)
  { 
    *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
  }
  
  return status;
}

Referenced by HAL_FLASHEx_OBProgram().

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FLASH_OB_RDPConfig()

static void FLASH_OB_RDPConfig ( uint32_t  RDPLevel )

static

Set the read protection level.

Note

To configure the RDP level, the option lock bit OPTLOCK must be cleared with the call of the HAL_FLASH_OB_Unlock() function.

To validate the RDP level, the option bytes must be reloaded through the call of the HAL_FLASH_OB_Launch() function.

!!! Warning : When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 !!!

Parameters

RDPLevel

specifies the read protection level. This parameter can be one of the following values: OB_RDP_LEVEL_0: No protection OB_RDP_LEVEL_1: Read protection of the memory OB_RDP_LEVEL_2: Full chip protection

Return values

HAL

status

Definition at line 1110 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_RDP_LEVEL(RDPLevel));
 
  /* Configure the RDP level in the option bytes register */
  MODIFY_REG(FLASH->OPTSR_PRG, FLASH_OPTSR_RDP, RDPLevel);
}

FLASH_OB_SecureAreaConfig()

static void FLASH_OB_SecureAreaConfig ( uint32_t  SecureAreaConfig, uint32_t  SecureAreaStartAddr, uint32_t  SecureAreaEndAddr, uint32_t  Banks  )

static

Set secure area configuration.

Parameters

SecureAreaConfig	specify if the secure area will be deleted or not when RDP level decreased from Level 1 to Level 0 or during a mass erase.
SecureAreaStartAddr	Specifies the secure area start address
SecureAreaEndAddr	Specifies the secure area end address
Banks	the specific bank to apply Security protection This parameter can be one of the following values: FLASH_BANK_1: Secure area on specified bank1 area FLASH_BANK_2: Secure area on specified bank2 area FLASH_BANK_BOTH: Secure area on specified bank1 and bank2 area (same config will be applied on both banks)

Return values

None

Definition at line 1644 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));
  assert_param(IS_OB_SECURE_RDP(SecureAreaConfig));
 
  if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
  {
    /* Check the parameters */
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(SecureAreaStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(SecureAreaEndAddr));
 
    /* Configure the secure area */
    FLASH->SCAR_PRG1 = ((SecureAreaStartAddr - FLASH_BANK1_BASE) >> 8)                                | \
                       (((SecureAreaEndAddr - FLASH_BANK1_BASE) >> 8) << FLASH_SCAR_SEC_AREA_END_Pos) | \
                       (SecureAreaConfig & FLASH_SCAR_DMES);
  }
 
#if defined (DUAL_BANK)
  if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
  {
    /* Check the parameters */
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(SecureAreaStartAddr));
    assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(SecureAreaEndAddr));
 
    /* Configure the secure area */
    FLASH->SCAR_PRG2 = ((SecureAreaStartAddr - FLASH_BANK2_BASE) >> 8)                                | \
                       (((SecureAreaEndAddr - FLASH_BANK2_BASE) >> 8) << FLASH_SCAR_SEC_AREA_END_Pos) | \
                       (SecureAreaConfig & FLASH_SCAR_DMES);
  }
#endif /* DUAL_BANK */
}

FLASH_OB_SharedRAM_Config()

static void FLASH_OB_SharedRAM_Config ( uint32_t  SharedRamConfig )

static

Configure the TCM / AXI Shared RAM.

Parameters

SharedRamConfig

specifies the Shared RAM configuration. This parameter can be a value of FLASHEx OB TCM AXI SHARED

Return values

None

Definition at line 1812 of file stm32h7xx_hal_flash_ex.c.

{
  /* Check the parameters */
  assert_param(IS_OB_USER_TCM_AXI_SHARED(SharedRamConfig));
 
  /* Configure the TCM / AXI Shared RAM in the option bytes register */
  MODIFY_REG(FLASH->OPTSR2_PRG, FLASH_OPTSR2_TCM_AXI_SHARED, SharedRamConfig);
}

FLASH_OB_SharedRAM_GetConfig()

static uint32_t FLASH_OB_SharedRAM_GetConfig ( void  )

static

Get the TCM / AXI Shared RAM configurtion.

Return values

SharedRamConfig

returns the TCM / AXI Shared RAM configuration. This return value can be a value of FLASHEx OB TCM AXI SHARED

Definition at line 1826 of file stm32h7xx_hal_flash_ex.c.

{
  return (FLASH->OPTSR2_CUR & FLASH_OPTSR2_TCM_AXI_SHARED);;
}

FLASH_OB_UserConfig() [1/4]

static void FLASH_OB_UserConfig ( uint32_t  UserType, uint32_t  UserConfig  )

static

Program the FLASH User Option Byte.

Note

To configure the user option bytes, the option lock bit OPTLOCK must be cleared with the call of the HAL_FLASH_OB_Unlock() function.

To validate the user option bytes, the option bytes must be reloaded through the call of the HAL_FLASH_OB_Launch() function.

Parameters

UserType	The FLASH User Option Bytes to be modified : a combination of FLASHEx OB USER Type
UserConfig	The FLASH User Option Bytes values: IWDG1_SW(Bit4), IWDG2_SW(Bit 5), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7), FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]), SECURITY(Bit 21), BCM4(Bit 22), BCM7(Bit 23), nRST_STOP_D2(Bit 24), nRST_STDY_D2(Bit 25), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).

Return values

HAL

status

Program the FLASH User Option Byte.

Note

To configure the user option bytes, the option lock bit OPTLOCK must be cleared with the call of the HAL_FLASH_OB_Unlock() function.

To validate the user option bytes, the option bytes must be reloaded through the call of the HAL_FLASH_OB_Launch() function.

Parameters

UserType	The FLASH User Option Bytes to be modified : a combination of FLASHEx_OB_USER_Type
UserConfig	The FLASH User Option Bytes values: IWDG_SW(Bit4), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7), FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]), SECURITY(Bit 21), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).

Return values

HAL

status

Definition at line 1183 of file stm32h7xx_hal_flash_ex.c.

{
  uint32_t optr_reg_val = 0;
  uint32_t optr_reg_mask = 0;
 
  /* Check the parameters */
  assert_param(IS_OB_USER_TYPE(UserType));
 
  if((UserType & OB_USER_IWDG1_SW) != 0U)
  {
    /* IWDG_HW option byte should be modified */
    assert_param(IS_OB_IWDG1_SOURCE(UserConfig & FLASH_OPTSR_IWDG1_SW));
 
    /* Set value and mask for IWDG_HW option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_IWDG1_SW);
    optr_reg_mask |= FLASH_OPTSR_IWDG1_SW;
  }
#if defined(DUAL_CORE)
  if((UserType & OB_USER_IWDG2_SW) != 0U)
  {
    /* IWDG2_SW option byte should be modified */
    assert_param(IS_OB_IWDG2_SOURCE(UserConfig & FLASH_OPTSR_IWDG2_SW));
 
    /* Set value and mask for IWDG2_SW option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_IWDG2_SW);
    optr_reg_mask |= FLASH_OPTSR_IWDG2_SW;
  }
#endif /*DUAL_CORE*/
  if((UserType & OB_USER_NRST_STOP_D1) != 0U)
  {
    /* NRST_STOP option byte should be modified */
    assert_param(IS_OB_STOP_D1_RESET(UserConfig & FLASH_OPTSR_NRST_STOP_D1));
 
    /* Set value and mask for NRST_STOP option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_NRST_STOP_D1);
    optr_reg_mask |= FLASH_OPTSR_NRST_STOP_D1;
  }
 
  if((UserType & OB_USER_NRST_STDBY_D1) != 0U)
  {
    /* NRST_STDBY option byte should be modified */
    assert_param(IS_OB_STDBY_D1_RESET(UserConfig & FLASH_OPTSR_NRST_STBY_D1));
 
    /* Set value and mask for NRST_STDBY option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_NRST_STBY_D1);
    optr_reg_mask |= FLASH_OPTSR_NRST_STBY_D1;
  }
 
  if((UserType & OB_USER_IWDG_STOP) != 0U)
  {
    /* IWDG_STOP option byte should be modified */
    assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTSR_FZ_IWDG_STOP));
 
    /* Set value and mask for IWDG_STOP option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_FZ_IWDG_STOP);
    optr_reg_mask |= FLASH_OPTSR_FZ_IWDG_STOP;
  }
 
  if((UserType & OB_USER_IWDG_STDBY) != 0U)
  {
    /* IWDG_STDBY option byte should be modified */
    assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTSR_FZ_IWDG_SDBY));
 
    /* Set value and mask for IWDG_STDBY option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_FZ_IWDG_SDBY);
    optr_reg_mask |= FLASH_OPTSR_FZ_IWDG_SDBY;
  }
 
  if((UserType & OB_USER_ST_RAM_SIZE) != 0U)
  {
    /* ST_RAM_SIZE option byte should be modified */
    assert_param(IS_OB_USER_ST_RAM_SIZE(UserConfig & FLASH_OPTSR_ST_RAM_SIZE));
 
    /* Set value and mask for ST_RAM_SIZE option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_ST_RAM_SIZE);
    optr_reg_mask |= FLASH_OPTSR_ST_RAM_SIZE;
  }
 
  if((UserType & OB_USER_SECURITY) != 0U)
  {
    /* SECURITY option byte should be modified */
    assert_param(IS_OB_USER_SECURITY(UserConfig & FLASH_OPTSR_SECURITY));
 
    /* Set value and mask for SECURITY option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_SECURITY);
    optr_reg_mask |= FLASH_OPTSR_SECURITY;
  }
 
#if defined(DUAL_CORE)
  if((UserType & OB_USER_BCM4) != 0U)
  {
    /* BCM4 option byte should be modified */
    assert_param(IS_OB_USER_BCM4(UserConfig & FLASH_OPTSR_BCM4));
 
    /* Set value and mask for BCM4 option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_BCM4);
    optr_reg_mask |= FLASH_OPTSR_BCM4;
  }
 
  if((UserType & OB_USER_BCM7) != 0U)
  {
    /* BCM7 option byte should be modified */
    assert_param(IS_OB_USER_BCM7(UserConfig & FLASH_OPTSR_BCM7));
 
    /* Set value and mask for BCM7 option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_BCM7);
    optr_reg_mask |= FLASH_OPTSR_BCM7;
  }
#endif /* DUAL_CORE */
 
#if defined (FLASH_OPTSR_NRST_STOP_D2)
  if((UserType & OB_USER_NRST_STOP_D2) != 0U)
  {
    /* NRST_STOP option byte should be modified */
    assert_param(IS_OB_STOP_D2_RESET(UserConfig & FLASH_OPTSR_NRST_STOP_D2));
 
    /* Set value and mask for NRST_STOP option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_NRST_STOP_D2);
    optr_reg_mask |= FLASH_OPTSR_NRST_STOP_D2;
  }
 
  if((UserType & OB_USER_NRST_STDBY_D2) != 0U)
  {
    /* NRST_STDBY option byte should be modified */
    assert_param(IS_OB_STDBY_D2_RESET(UserConfig & FLASH_OPTSR_NRST_STBY_D2));
 
    /* Set value and mask for NRST_STDBY option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_NRST_STBY_D2);
    optr_reg_mask |= FLASH_OPTSR_NRST_STBY_D2;
  }
#endif /* FLASH_OPTSR_NRST_STOP_D2 */
 
#if defined (DUAL_BANK)
  if((UserType & OB_USER_SWAP_BANK) != 0U)
  {
    /* SWAP_BANK_OPT option byte should be modified */
    assert_param(IS_OB_USER_SWAP_BANK(UserConfig & FLASH_OPTSR_SWAP_BANK_OPT));
 
    /* Set value and mask for SWAP_BANK_OPT option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_SWAP_BANK_OPT);
    optr_reg_mask |= FLASH_OPTSR_SWAP_BANK_OPT;
  }
#endif /* DUAL_BANK */
 
  if((UserType & OB_USER_IOHSLV) != 0U)
  {
    /* IOHSLV_OPT option byte should be modified */
    assert_param(IS_OB_USER_IOHSLV(UserConfig & FLASH_OPTSR_IO_HSLV));
 
    /* Set value and mask for IOHSLV_OPT option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_IO_HSLV);
    optr_reg_mask |= FLASH_OPTSR_IO_HSLV;
  }
 
#if defined (FLASH_OPTSR_VDDMMC_HSLV)
  if((UserType & OB_USER_VDDMMC_HSLV) != 0U)
  {
    /* VDDMMC_HSLV option byte should be modified */
    assert_param(IS_OB_USER_VDDMMC_HSLV(UserConfig & FLASH_OPTSR_VDDMMC_HSLV));
 
    /* Set value and mask for VDDMMC_HSLV option byte */
    optr_reg_val |= (UserConfig & FLASH_OPTSR_VDDMMC_HSLV);
    optr_reg_mask |= FLASH_OPTSR_VDDMMC_HSLV;
  }
#endif /* FLASH_OPTSR_VDDMMC_HSLV */
 
  /* Configure the option bytes register */
  MODIFY_REG(FLASH->OPTSR_PRG, optr_reg_mask, optr_reg_val);
}

FLASH_OB_UserConfig() [2/4]

static HAL_StatusTypeDef FLASH_OB_UserConfig ( uint32_t  Wwdg, uint32_t  Iwdg, uint32_t  Stop, uint32_t  Stdby, uint32_t  Iwdgstop, \ uint32_t  Iwdgstdby, uint32_t  NDBank, uint32_t  NDBoot  )

static

Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.

Parameters

Wwdg	Selects the IWDG mode This parameter can be one of the following values: OB_WWDG_SW: Software WWDG selected OB_WWDG_HW: Hardware WWDG selected
Iwdg	Selects the WWDG mode This parameter can be one of the following values: OB_IWDG_SW: Software IWDG selected OB_IWDG_HW: Hardware IWDG selected
Stop	Reset event when entering STOP mode. This parameter can be one of the following values: OB_STOP_NO_RST: No reset generated when entering in STOP OB_STOP_RST: Reset generated when entering in STOP
Stdby	Reset event when entering Standby mode. This parameter can be one of the following values: OB_STDBY_NO_RST: No reset generated when entering in STANDBY OB_STDBY_RST: Reset generated when entering in STANDBY
Iwdgstop	Independent watchdog counter freeze in Stop mode. This parameter can be one of the following values: OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
Iwdgstdby	Independent watchdog counter freeze in standby mode. This parameter can be one of the following values: OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY
NDBank	Flash Single Bank mode enabled. This parameter can be one of the following values: OB_NDBANK_SINGLE_BANK: enable 256 bits mode (Flash is a single bank) OB_NDBANK_DUAL_BANK: disable 256 bits mode (Flash is a dual bank in 128 bits mode)
NDBoot	Flash Dual boot mode disable. This parameter can be one of the following values: OB_DUAL_BOOT_DISABLE: Disable Dual Boot OB_DUAL_BOOT_ENABLE: Enable Dual Boot

Return values

HAL

Status

Definition at line 602 of file stm32f7xx_hal_flash_ex.c.

{
  uint32_t useroptionmask = 0x00;
  uint32_t useroptionvalue = 0x00;
 
  HAL_StatusTypeDef status = HAL_OK;
 
  /* Check the parameters */
  assert_param(IS_OB_WWDG_SOURCE(Wwdg));
  assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  assert_param(IS_OB_STOP_SOURCE(Stop));
  assert_param(IS_OB_STDBY_SOURCE(Stdby));
  assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop));
  assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby));
  assert_param(IS_OB_NDBANK(NDBank));
  assert_param(IS_OB_NDBOOT(NDBoot));
  
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  
  if(status == HAL_OK)
  {
    useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \
                      FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY | \
                      FLASH_OPTCR_nDBOOT | FLASH_OPTCR_nDBANK);
                      
    useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby | NDBoot | NDBank);
        
    /* Update User Option Byte */               
    MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue);
  }
  
  return status; 
}

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FLASH_OB_UserConfig() [3/4]

static HAL_StatusTypeDef FLASH_OB_UserConfig ( uint32_t  Wwdg, uint32_t  Iwdg, uint32_t  Stop, uint32_t  Stdby, uint32_t  Iwdgstop, uint32_t  Iwdgstdby  )

static

Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.

Parameters

Wwdg	Selects the IWDG mode This parameter can be one of the following values: OB_WWDG_SW: Software WWDG selected OB_WWDG_HW: Hardware WWDG selected
Iwdg	Selects the WWDG mode This parameter can be one of the following values: OB_IWDG_SW: Software IWDG selected OB_IWDG_HW: Hardware IWDG selected
Stop	Reset event when entering STOP mode. This parameter can be one of the following values: OB_STOP_NO_RST: No reset generated when entering in STOP OB_STOP_RST: Reset generated when entering in STOP
Stdby	Reset event when entering Standby mode. This parameter can be one of the following values: OB_STDBY_NO_RST: No reset generated when entering in STANDBY OB_STDBY_RST: Reset generated when entering in STANDBY
Iwdgstop	Independent watchdog counter freeze in Stop mode. This parameter can be one of the following values: OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
Iwdgstdby	Independent watchdog counter freeze in standby mode. This parameter can be one of the following values: OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY

Return values

HAL

Status

Definition at line 771 of file stm32f7xx_hal_flash_ex.c.

{
  uint32_t useroptionmask = 0x00;
  uint32_t useroptionvalue = 0x00;
 
  HAL_StatusTypeDef status = HAL_OK;
 
  /* Check the parameters */
  assert_param(IS_OB_WWDG_SOURCE(Wwdg));
  assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  assert_param(IS_OB_STOP_SOURCE(Stop));
  assert_param(IS_OB_STDBY_SOURCE(Stdby));
  assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop));
  assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby));
 
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  
  if(status == HAL_OK)
  {
    useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \
                      FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY);
                      
    useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby);
        
    /* Update User Option Byte */               
    MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue);
  }
  
  return status; 
 
}

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FLASH_OB_UserConfig() [4/4]

static HAL_StatusTypeDef FLASH_OB_UserConfig ( uint8_t  Iwdg, uint8_t  Stop, uint8_t  Stdby  )

static

Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.

Parameters

Iwdg	Selects the IWDG mode This parameter can be one of the following values: OB_IWDG_SW: Software IWDG selected OB_IWDG_HW: Hardware IWDG selected
Stop	Reset event when entering STOP mode. This parameter can be one of the following values: OB_STOP_NO_RST: No reset generated when entering in STOP OB_STOP_RST: Reset generated when entering in STOP
Stdby	Reset event when entering Standby mode. This parameter can be one of the following values: OB_STDBY_NO_RST: No reset generated when entering in STANDBY OB_STDBY_RST: Reset generated when entering in STANDBY

Return values

HAL

Status

Definition at line 1252 of file stm32f4xx_hal_flash_ex.c.

{
  uint8_t optiontmp = 0xFF;
  HAL_StatusTypeDef status = HAL_OK;
 
  /* Check the parameters */
  assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  assert_param(IS_OB_STOP_SOURCE(Stop));
  assert_param(IS_OB_STDBY_SOURCE(Stdby));
 
  /* Wait for last operation to be completed */
  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  
  if(status == HAL_OK)
  {     
    /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
    optiontmp =  (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
 
    /* Update User Option Byte */
    *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp))); 
  }
  
  return status; 
}

Referenced by HAL_FLASHEx_OBProgram().

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FLASH_WaitForLastOperation()

HAL_StatusTypeDef FLASH_WaitForLastOperation ( uint32_t  Timeout )

extern

Wait for a FLASH operation to complete.

Parameters

Timeout

maximum flash operationtimeout

Return values

HAL

Status

Definition at line 569 of file stm32f4xx_hal_flash.c.

{
  (void)Timeout;
 
  /* Clear Error Code */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
  
  /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
     Even if the FLASH operation fails, the BUSY flag will be reset and an error
     flag will be set */
  /* Get tick */
  // todo: implement rusEfi own timeout
  // uint32_t tickstart = HAL_GetTick();
 
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET) 
  { 
      /*
      // todo: implement rusEfi own timeout
      if(Timeout != HAL_MAX_DELAY)
    {
      if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
      {
        return HAL_TIMEOUT;
      }
    } 
    */
  }
 
  /* Check FLASH End of Operation flag  */
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
  {
    /* Clear FLASH End of Operation pending bit */
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
  }
  
  if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
                           FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_RDERR)) != RESET)
  {
    /*Save the error code*/
    FLASH_SetErrorCode();
    return HAL_ERROR;
  }
 
  /* If there is no error flag set */
  return HAL_OK;
  
}  

Referenced by FLASH_OB_BootAddressConfig(), FLASH_OB_BootConfig(), FLASH_OB_DisablePCROP(), FLASH_OB_DisablePCROP(), FLASH_OB_DisableWRP(), FLASH_OB_DisableWRP(), FLASH_OB_EnablePCROP(), FLASH_OB_EnablePCROP(), FLASH_OB_EnableWRP(), FLASH_OB_EnableWRP(), FLASH_OB_PCROP_Config(), FLASH_OB_PCROP_RDP_Config(), FLASH_OB_RDP_LevelConfig(), FLASH_OB_RDP_LevelConfig(), FLASH_OB_UserConfig(), FLASH_OB_UserConfig(), FLASH_OB_UserConfig(), HAL_FLASH_OB_Launch(), HAL_FLASH_Program(), and HAL_FLASHEx_Erase().

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