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Functions
STM32F7xx_System_Private_Functions
Collaboration diagram for STM32F7xx_System_Private_Functions:

Functions

void SystemInit (void)
 Setup the microcontroller system Initialize the Embedded Flash Interface, the PLL and update the SystemFrequency variable.
 
void SystemCoreClockUpdate (void)
 Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters.
 

Detailed Description

Function Documentation

◆ SystemCoreClockUpdate()

void SystemCoreClockUpdate ( void  )

Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters.

Note
Each time the core clock (HCLK) changes, this function must be called to update SystemCoreClock variable value. Otherwise, any configuration based on this variable will be incorrect.
- The system frequency computed by this function is not the real frequency in the chip. It is calculated based on the predefined constant and the selected clock source:
  • If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
  • If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
  • If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) or HSI_VALUE(*) multiplied/divided by the PLL factors.

(*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 16 MHz) but the real value may vary depending on the variations in voltage and temperature.

(**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 25 MHz), user has to ensure that HSE_VALUE is same as the real frequency of the crystal used. Otherwise, this function may have wrong result.

  • The result of this function could be not correct when using fractional value for HSE crystal.
Parameters
None
Return values
None

Definition at line 222 of file system_stm32f7xx.c.

223{
224 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
225
226 /* Get SYSCLK source -------------------------------------------------------*/
227 tmp = RCC->CFGR & RCC_CFGR_SWS;
228
229 switch (tmp)
230 {
231 case 0x00: /* HSI used as system clock source */
232 SystemCoreClock = HSI_VALUE;
233 break;
234 case 0x04: /* HSE used as system clock source */
235 SystemCoreClock = HSE_VALUE;
236 break;
237 case 0x08: /* PLL used as system clock source */
238
239 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
240 SYSCLK = PLL_VCO / PLL_P
241 */
242 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
243 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
244
245 if (pllsource != 0)
246 {
247 /* HSE used as PLL clock source */
248 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
249 }
250 else
251 {
252 /* HSI used as PLL clock source */
253 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
254 }
255
256 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
257 SystemCoreClock = pllvco/pllp;
258 break;
259 default:
260 SystemCoreClock = HSI_VALUE;
261 break;
262 }
263 /* Compute HCLK frequency --------------------------------------------------*/
264 /* Get HCLK prescaler */
265 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
266 /* HCLK frequency */
267 SystemCoreClock >>= tmp;
268}
const uint8_t AHBPrescTable[16]
uint32_t SystemCoreClock

◆ SystemInit()

void SystemInit ( void  )

Setup the microcontroller system Initialize the Embedded Flash Interface, the PLL and update the SystemFrequency variable.

Parameters
None
Return values
None

Definition at line 153 of file system_stm32f7xx.c.

154{
155 /* FPU settings ------------------------------------------------------------*/
156 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
157 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
158 #endif
159 /* Reset the RCC clock configuration to the default reset state ------------*/
160 /* Set HSION bit */
161 RCC->CR |= (uint32_t)0x00000001;
162
163 /* Reset CFGR register */
164 RCC->CFGR = 0x00000000;
165
166 /* Reset HSEON, CSSON and PLLON bits */
167 RCC->CR &= (uint32_t)0xFEF6FFFF;
168
169 /* Reset PLLCFGR register */
170 RCC->PLLCFGR = 0x24003010;
171
172 /* Reset HSEBYP bit */
173 RCC->CR &= (uint32_t)0xFFFBFFFF;
174
175 /* Disable all interrupts */
176 RCC->CIR = 0x00000000;
177
178 /* Configure the Vector Table location add offset address ------------------*/
179#ifdef VECT_TAB_SRAM
180 SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
181#else
182 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
183#endif
184}