29#if HAL_USE_PAL || defined(__DOXYGEN__)
35#define PAL_MODE_ALTERNATIVE_1 0x10
36#define PAL_MODE_ALTERNATIVE_2 0x11
37#define PAL_MODE_ALTERNATIVE_3 0x12
38#define PAL_MODE_ALTERNATIVE_4 0x13
39#define PAL_MODE_ALTERNATIVE_5 0x14
40#define PAL_MODE_ALTERNATIVE_6 0x15
41#define PAL_MODE_ALTERNATIVE_7 0x16
44#define PIN_MUX_ALTERNATIVE(x) PORT_PCR_MUX(x)
46#define PAL_MODE_ALTERNATE(x) (PAL_MODE_ALTERNATIVE_1 + x - 1)
48#define PIN_MUX_ALTERNATIVE(x) PORTx_PCRn_MUX(x)
56#define PADS_PER_PORT 32
61#define PAL_IOPORTS_WIDTH 32
67#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
172#define PAL_LINE(port, pad) \
173 ((ioline_t)((uint32_t)(port) | ((uint32_t)(pad)<<20)))
178#define PAL_PORT(line) \
179 ((GPIO_TypeDef *)(((uint32_t)(line)) & 0xF00FFFFFU))
184#define PAL_PAD(line) \
185 ((uint32_t)((uint32_t)(line) & 0x0FF00000U)>>20)
190#define PAL_PORT_INDEX(port) \
191 (((uint32_t)port - PORTA_BASE) >> 12)
211#define pal_lld_init(config) _pal_lld_init(config)
221#define pal_lld_readport(port) \
234#define pal_lld_readlatch(port) \
245#define pal_lld_writeport(port, bits) \
246 (port)->PDOR = (bits)
259#define pal_lld_setport(port, bits) \
260 (port)->PSOR = (bits)
273#define pal_lld_clearport(port, bits) \
274 (port)->PCOR = (bits)
287#define pal_lld_toggleport(port, bits) \
288 (port)->PTOR = (bits)
303#define pal_lld_readgroup(port, mask, offset) 0
319#define pal_lld_writegroup(port, mask, offset, bits) (void)bits
334#define pal_lld_setgroupmode(port, mask, offset, mode) \
335 _pal_lld_setgroupmode(port, mask << offset, mode)
351#define pal_lld_readpad(port, pad) _pal_lld_readpad(port, pad)
368#define pal_lld_writepad(port, pad, bit) _pal_lld_writepad(port, pad, bit)
381#define pal_lld_setpad(port, pad) (port)->PSOR = ((uint32_t) 1 << (pad))
394#define pal_lld_clearpad(port, pad) (port)->PCOR = ((uint32_t) 1 << (pad))
407#define pal_lld_togglepad(port, pad) (port)->PTOR = ((uint32_t) 1 << (pad))
423#define pal_lld_setpadmode(port, pad, mode) \
424 _pal_lld_setpadmode(port, pad, mode)
427#if (PAL_USE_WAIT == TRUE) || (PAL_USE_CALLBACKS == TRUE)
429#define KINETIS_GPIO_NUM_PORTS 5
430#define KINETIS_GPIO_NUM_PADS 16
431#define KINETIS_GPIO_NUM_LINES (KINETIS_GPIO_NUM_PADS)
443#define pal_lld_enablepadevent(port, pad, mode) \
444 _pal_lld_enablepadevent(port, pad, mode)
455#define pal_lld_disablepadevent(port, pad) \
456 _pal_lld_disablepadevent(port, pad)
466#define pal_lld_get_pad_event(port, pad) \
476#define pal_lld_get_line_event(line) \
477 pal_lld_get_pad_event(PAL_PORT(line), PAL_PAD(line))
479extern palevent_t
_pal_events[KINETIS_GPIO_NUM_LINES];
502#if PAL_USE_CALLBACKS || PAL_USE_WAIT
static ioportid_t ports[]
static constexpr persistent_config_s * config
void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
Pad mode setup.
void _pal_lld_writepad(ioportid_t port, uint8_t pad, uint8_t bit)
Writes a logical state on an output pad.
uint32_t ioeventmode_t
Type of an event mode.
uint32_t ioportmask_t
Digital I/O port sized unsigned type.
void _pal_lld_init(void)
Kinetis I/O ports configuration.
palevent_t _pal_events[KINETIS_GPIO_NUM_LINES]
Event records for the 16 GPIO EXTI channels.
uint8_t _pal_lld_readpad(ioportid_t port, uint8_t pad)
Reads a logical state from an I/O pad.
void _pal_lld_enablepadevent(ioportid_t port, iopadid_t pad, ioeventmode_t mode)
void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad)
void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode)
Pads mode setup.
GPIO_TypeDef * ioportid_t
Port Identifier.
uint32_t iomode_t
Digital I/O modes.
uint32_t iopadid_t
Type of an pad identifier.
uint32_t ioline_t
Type of an I/O line.
Generic I/O ports static initializer.