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stm32f4xx_hal_flash_ex.h
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_flash_ex.h
4 * @author MCD Application Team
5 * @version V1.4.0
6 * @date 14-August-2015
7 * @brief Header file of FLASH HAL Extension module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_FLASH_EX_H
40#define __STM32F4xx_HAL_FLASH_EX_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46/* Includes ------------------------------------------------------------------*/
47#include "stm32f4xx_hal_def.h"
48
49/** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53/** @addtogroup FLASHEx
54 * @{
55 */
56
57/* Exported types ------------------------------------------------------------*/
58/** @defgroup FLASHEx_Exported_Types FLASH Exported Types
59 * @{
60 */
61
62/**
63 * @brief FLASH Erase structure definition
64 */
65typedef struct
66{
67 uint32_t TypeErase; /*!< Mass erase or sector Erase.
68 This parameter can be a value of @ref FLASHEx_Type_Erase */
69
70 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
71 This parameter must be a value of @ref FLASHEx_Banks */
72
73 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
74 This parameter must be a value of @ref FLASHEx_Sectors */
75
76 uint32_t NbSectors; /*!< Number of sectors to be erased.
77 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
78
79 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
80 This parameter must be a value of @ref FLASHEx_Voltage_Range */
81
82} FLASH_EraseInitTypeDef;
83
84/**
85 * @brief FLASH Option Bytes Program structure definition
86 */
87typedef struct
88{
89 uint32_t OptionType; /*!< Option byte to be configured.
90 This parameter can be a value of @ref FLASHEx_Option_Type */
91
92 uint32_t WRPState; /*!< Write protection activation or deactivation.
93 This parameter can be a value of @ref FLASHEx_WRP_State */
94
95 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
96 The value of this parameter depend on device used within the same series */
97
98 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
99 This parameter must be a value of @ref FLASHEx_Banks */
100
101 uint32_t RDPLevel; /*!< Set the read protection level.
102 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
103
104 uint32_t BORLevel; /*!< Set the BOR Level.
105 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
106
107 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
108
109} FLASH_OBProgramInitTypeDef;
110
111/**
112 * @brief FLASH Advanced Option Bytes Program structure definition
113 */
114#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
115 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
116 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
117 defined(STM32F479xx)
118typedef struct
119{
120 uint32_t OptionType; /*!< Option byte to be configured for extension.
121 This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
122
123 uint32_t PCROPState; /*!< PCROP activation or deactivation.
124 This parameter can be a value of @ref FLASHEx_PCROP_State */
125
126#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
127 uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
128 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
129#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
130
131#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
132 uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
133 This parameter must be a value of @ref FLASHEx_Banks */
134
135 uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
136 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
137
138 uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
139 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
140
141 uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
142 This parameter can be a value of @ref FLASHEx_Dual_Boot */
143
144#endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
145} FLASH_AdvOBProgramInitTypeDef;
146#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
147/**
148 * @}
149 */
150
151/* Exported constants --------------------------------------------------------*/
152
153/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
154 * @{
155 */
156
157/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
158 * @{
159 */
160#define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */
161#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */
162/**
163 * @}
164 */
165
166/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
167 * @{
168 */
169#define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
170#define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */
171#define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */
172#define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */
173/**
174 * @}
175 */
176
177/** @defgroup FLASHEx_WRP_State FLASH WRP State
178 * @{
179 */
180#define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */
181#define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */
182/**
183 * @}
184 */
185
186/** @defgroup FLASHEx_Option_Type FLASH Option Type
187 * @{
188 */
189#define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */
190#define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */
191#define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */
192#define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */
193/**
194 * @}
195 */
196
197/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
198 * @{
199 */
200#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
201#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
202#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
203 it s no more possible to go back to level 1 or 0 */
204/**
205 * @}
206 */
207
208/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
209 * @{
210 */
211#define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
212#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
213/**
214 * @}
215 */
216
217/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
218 * @{
219 */
220#define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
221#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
222/**
223 * @}
224 */
225
226
227/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
228 * @{
229 */
230#define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
231#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
232/**
233 * @}
234 */
235
236/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
237 * @{
238 */
239#define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
240#define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
241#define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
242#define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
243/**
244 * @}
245 */
246
247#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
248 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
249 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
250 defined(STM32F479xx)
251/** @defgroup FLASHEx_PCROP_State FLASH PCROP State
252 * @{
253 */
254#define OB_PCROP_STATE_DISABLE ((uint32_t)0x00) /*!< Disable PCROP */
255#define OB_PCROP_STATE_ENABLE ((uint32_t)0x01) /*!< Enable PCROP */
256/**
257 * @}
258 */
259#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
260 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
261
262/** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
263 * @{
264 */
265#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
266 defined(STM32F469xx) || defined(STM32F479xx)
267#define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!< PCROP option byte configuration */
268#define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02) /*!< BOOTConfig option byte configuration */
269#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
270
271#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
272 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
273#define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration */
274#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
275/**
276 * @}
277 */
278
279/** @defgroup FLASH_Latency FLASH Latency
280 * @{
281 */
282/*------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ----------------------*/
283#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
284 defined(STM32F469xx) || defined(STM32F479xx)
285#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
286#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
287#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
288#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
289#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
290#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
291#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
292#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
293#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
294#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
295#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
296#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
297#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
298#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
299#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
300#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
301#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
302/*--------------------------------------------------------------------------------------------------------------*/
303
304/*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------*/
305#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
306 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
307 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
308
309#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
310#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
311#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
312#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
313#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
314#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
315#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
316#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
317#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
318/*--------------------------------------------------------------------------------------------------------------*/
319
320/**
321 * @}
322 */
323
324
325/** @defgroup FLASHEx_Banks FLASH Banks
326 * @{
327 */
328#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
329 defined(STM32F469xx) || defined(STM32F479xx)
330#define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
331#define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
332#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
333#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
334
335#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
336 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
337 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
338#define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
339#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
340/**
341 * @}
342 */
343
344/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
345 * @{
346 */
347#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
348 defined(STM32F469xx) || defined(STM32F479xx)
349#define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */
350#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
351
352#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
353 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
354 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
355#define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
356#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
357/**
358 * @}
359 */
360
361/** @defgroup FLASHEx_Sectors FLASH Sectors
362 * @{
363 */
364/*-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------*/
365#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
366 defined(STM32F469xx) || defined(STM32F479xx)
367#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
368#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
369#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
370#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
371#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
372#define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
373#define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
374#define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
375#define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */
376#define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */
377#define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */
378#define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */
379#define FLASH_SECTOR_12 ((uint32_t)12) /*!< Sector Number 12 */
380#define FLASH_SECTOR_13 ((uint32_t)13) /*!< Sector Number 13 */
381#define FLASH_SECTOR_14 ((uint32_t)14) /*!< Sector Number 14 */
382#define FLASH_SECTOR_15 ((uint32_t)15) /*!< Sector Number 15 */
383#define FLASH_SECTOR_16 ((uint32_t)16) /*!< Sector Number 16 */
384#define FLASH_SECTOR_17 ((uint32_t)17) /*!< Sector Number 17 */
385#define FLASH_SECTOR_18 ((uint32_t)18) /*!< Sector Number 18 */
386#define FLASH_SECTOR_19 ((uint32_t)19) /*!< Sector Number 19 */
387#define FLASH_SECTOR_20 ((uint32_t)20) /*!< Sector Number 20 */
388#define FLASH_SECTOR_21 ((uint32_t)21) /*!< Sector Number 21 */
389#define FLASH_SECTOR_22 ((uint32_t)22) /*!< Sector Number 22 */
390#define FLASH_SECTOR_23 ((uint32_t)23) /*!< Sector Number 23 */
391#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
392/*-----------------------------------------------------------------------------------------------------*/
393
394/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
395#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
396#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
397#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
398#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
399#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
400#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
401#define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
402#define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
403#define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
404#define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */
405#define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */
406#define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */
407#define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */
408#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
409/*-----------------------------------------------------------------------------------------------------*/
410
411/*--------------------------------------------- STM32F401xC -------------------------------------------*/
412#if defined(STM32F401xC)
413#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
414#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
415#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
416#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
417#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
418#define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
419#endif /* STM32F401xC */
420/*-----------------------------------------------------------------------------------------------------*/
421
422/*--------------------------------------------- STM32F410xx -------------------------------------------*/
423#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
424#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
425#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
426#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
427#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
428#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
429#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
430/*-----------------------------------------------------------------------------------------------------*/
431
432/*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
433#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
434#define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
435#define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
436#define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
437#define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
438#define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
439#define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
440#define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
441#define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
442#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
443/*-----------------------------------------------------------------------------------------------------*/
444
445/**
446 * @}
447 */
448
449/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
450 * @{
451 */
452/*--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------*/
453#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
454 defined(STM32F469xx) || defined(STM32F479xx)
455#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
456#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
457#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
458#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
459#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
460#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
461#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
462#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
463#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
464#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
465#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
466#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
467#define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /*!< Write protection of Sector12 */
468#define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /*!< Write protection of Sector13 */
469#define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /*!< Write protection of Sector14 */
470#define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /*!< Write protection of Sector15 */
471#define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /*!< Write protection of Sector16 */
472#define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /*!< Write protection of Sector17 */
473#define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /*!< Write protection of Sector18 */
474#define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /*!< Write protection of Sector19 */
475#define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /*!< Write protection of Sector20 */
476#define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /*!< Write protection of Sector21 */
477#define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /*!< Write protection of Sector22 */
478#define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /*!< Write protection of Sector23 */
479#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /*!< Write protection of all Sectors */
480#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
481/*-----------------------------------------------------------------------------------------------------*/
482
483/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
484#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
485#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
486#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
487#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
488#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
489#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
490#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
491#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
492#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
493#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
494#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
495#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
496#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
497#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
498#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
499/*-----------------------------------------------------------------------------------------------------*/
500
501/*--------------------------------------------- STM32F401xC -------------------------------------------*/
502#if defined(STM32F401xC)
503#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
504#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
505#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
506#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
507#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
508#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
509#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
510#endif /* STM32F401xC */
511/*-----------------------------------------------------------------------------------------------------*/
512
513/*--------------------------------------------- STM32F410xx -------------------------------------------*/
514#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
515#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
516#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
517#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
518#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
519#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
520#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
521#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
522/*-----------------------------------------------------------------------------------------------------*/
523
524/*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
525#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
526#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
527#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
528#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
529#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
530#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
531#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
532#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
533#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
534#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
535#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
536/*-----------------------------------------------------------------------------------------------------*/
537/**
538 * @}
539 */
540
541/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
542 * @{
543 */
544/*-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------*/
545#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
546 defined(STM32F469xx) || defined(STM32F479xx)
547#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
548#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
549#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
550#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
551#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
552#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
553#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
554#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
555#define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
556#define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
557#define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
558#define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
559#define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
560#define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
561#define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
562#define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
563#define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
564#define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
565#define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
566#define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
567#define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
568#define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
569#define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
570#define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
571#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
572#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
573/*-----------------------------------------------------------------------------------------------------*/
574
575/*--------------------------------------------- STM32F401xC -------------------------------------------*/
576#if defined(STM32F401xC)
577#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
578#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
579#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
580#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
581#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
582#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
583#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
584#endif /* STM32F401xC */
585/*-----------------------------------------------------------------------------------------------------*/
586
587/*--------------------------------------------- STM32F410xx -------------------------------------------*/
588#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
589#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
590#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
591#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
592#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
593#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
594#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
595#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
596/*-----------------------------------------------------------------------------------------------------*/
597
598/*------------------------------ STM32F401xE/STM32F411xE/STM32F446xx ----------------------*/
599#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
600#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
601#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
602#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
603#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
604#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
605#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
606#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
607#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
608#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
609#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
610/*-----------------------------------------------------------------------------------------------------*/
611
612/**
613 * @}
614 */
615
616/** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
617 * @{
618 */
619#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
620 defined(STM32F469xx) || defined(STM32F479xx)
621#define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
622#define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
623#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
624/**
625 * @}
626 */
627
628/** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
629 * @{
630 */
631#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
632 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
633 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
634 defined(STM32F479xx)
635#define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
636#define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
637#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
638 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
639/**
640 * @}
641 */
642
643/**
644 * @}
645 */
646
647/* Exported macro ------------------------------------------------------------*/
648
649/* Exported functions --------------------------------------------------------*/
650/** @addtogroup FLASHEx_Exported_Functions
651 * @{
652 */
653
654/** @addtogroup FLASHEx_Exported_Functions_Group1
655 * @{
656 */
657/* Extension Program operation functions *************************************/
658HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
659HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
660HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
661void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
662
663#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
664 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
665 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
666 defined(STM32F479xx)
667HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
668void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
669HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
670HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
671#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
672 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
673
674#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
675 defined(STM32F469xx) || defined(STM32F479xx)
676uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
677#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
678/**
679 * @}
680 */
681
682/**
683 * @}
684 */
685/* Private types -------------------------------------------------------------*/
686/* Private variables ---------------------------------------------------------*/
687/* Private constants ---------------------------------------------------------*/
688/** @defgroup FLASHEx_Private_Constants FLASH Private Constants
689 * @{
690 */
691/*--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------*/
692#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
693#define FLASH_SECTOR_TOTAL 24
694#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
695
696/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
697#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
698#define FLASH_SECTOR_TOTAL 12
699#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
700
701/*--------------------------------------------- STM32F401xC -------------------------------------------*/
702#if defined(STM32F401xC)
703#define FLASH_SECTOR_TOTAL 6
704#endif /* STM32F401xC */
705
706/*--------------------------------------------- STM32F410xx -------------------------------------------*/
707#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
708#define FLASH_SECTOR_TOTAL 5
709#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
710
711/*--------------------------------- STM32F401xE/STM32F411xE/STM32F446xx -------------------*/
712#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
713#define FLASH_SECTOR_TOTAL 8
714#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
715
716/**
717 * @brief OPTCR1 register byte 2 (Bits[23:16]) base address
718 */
719#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
720#define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
721#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
722
723/**
724 * @}
725 */
726
727/* Private macros ------------------------------------------------------------*/
728/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
729 * @{
730 */
731
732/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
733 * @{
734 */
735
736#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
737 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
738
739#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
740 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
741 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
742 ((RANGE) == FLASH_VOLTAGE_RANGE_4))
743
744#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
745 ((VALUE) == OB_WRPSTATE_ENABLE))
746
747#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
748
749#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
750 ((LEVEL) == OB_RDP_LEVEL_1) ||\
751 ((LEVEL) == OB_RDP_LEVEL_2))
752
753#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
754
755#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
756
757#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
758
759#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
760 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
761
762#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
763 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
764 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
765 defined(STM32F479xx)
766#define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \
767 ((VALUE) == OB_PCROP_STATE_ENABLE))
768#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
769 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
770
771#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
772 defined(STM32F469xx) || defined(STM32F479xx)
773#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \
774 ((VALUE) == OPTIONBYTE_BOOTCONFIG))
775#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
776
777#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
778 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
779#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
780#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
781
782#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
783 defined(STM32F469xx) || defined(STM32F479xx)
784#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
785 ((LATENCY) == FLASH_LATENCY_1) || \
786 ((LATENCY) == FLASH_LATENCY_2) || \
787 ((LATENCY) == FLASH_LATENCY_3) || \
788 ((LATENCY) == FLASH_LATENCY_4) || \
789 ((LATENCY) == FLASH_LATENCY_5) || \
790 ((LATENCY) == FLASH_LATENCY_6) || \
791 ((LATENCY) == FLASH_LATENCY_7) || \
792 ((LATENCY) == FLASH_LATENCY_8) || \
793 ((LATENCY) == FLASH_LATENCY_9) || \
794 ((LATENCY) == FLASH_LATENCY_10) || \
795 ((LATENCY) == FLASH_LATENCY_11) || \
796 ((LATENCY) == FLASH_LATENCY_12) || \
797 ((LATENCY) == FLASH_LATENCY_13) || \
798 ((LATENCY) == FLASH_LATENCY_14) || \
799 ((LATENCY) == FLASH_LATENCY_15))
800#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
801
802#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
803 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
804 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
805#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
806 ((LATENCY) == FLASH_LATENCY_1) || \
807 ((LATENCY) == FLASH_LATENCY_2) || \
808 ((LATENCY) == FLASH_LATENCY_3) || \
809 ((LATENCY) == FLASH_LATENCY_4) || \
810 ((LATENCY) == FLASH_LATENCY_5) || \
811 ((LATENCY) == FLASH_LATENCY_6) || \
812 ((LATENCY) == FLASH_LATENCY_7))
813#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
814
815#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
816#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
817 ((BANK) == FLASH_BANK_2) || \
818 ((BANK) == FLASH_BANK_BOTH))
819#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
820
821#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
822 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
823 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
824#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
825#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
826
827
828#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
829#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
830 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
831 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
832 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
833 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
834 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
835 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
836 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\
837 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\
838 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\
839 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
840 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
841#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
842
843#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
844#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
845 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
846 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
847 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
848 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
849 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
850#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
851
852#if defined(STM32F401xC)
853#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
854 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
855 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5))
856#endif /* STM32F401xC */
857
858#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
859#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
860 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
861 ((SECTOR) == FLASH_SECTOR_4))
862#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
863
864#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
865#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
866 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
867 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
868 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
869#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
870
871#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
872#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
873
874#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
875#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000))
876#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
877
878#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
879#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
880#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
881
882#if defined(STM32F401xC)
883#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
884#endif /* STM32F401xC */
885
886#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
887#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
888#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
889
890#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
891#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
892#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
893
894#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
895#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
896#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
897
898#if defined(STM32F401xC)
899#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
900#endif /* STM32F401xC */
901
902#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
903#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
904#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
905
906#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
907#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
908#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
909
910#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
911 defined(STM32F469xx) || defined(STM32F479xx)
912#define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE))
913#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
914
915#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
916 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
917 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
918 defined(STM32F479xx)
919#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED))
920#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
921 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
922/**
923 * @}
924 */
925
926/**
927 * @}
928 */
929
930/* Private functions ---------------------------------------------------------*/
931/** @defgroup FLASHEx_Private_Functions FLASH Private Functions
932 * @{
933 */
934void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
935/**
936 * @}
937 */
938
939/**
940 * @}
941 */
942
943/**
944 * @}
945 */
946
947#ifdef __cplusplus
948}
949#endif
950
951#endif /* __STM32F4xx_HAL_FLASH_EX_H */
952
953/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_FLASHEx_OBProgram
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
Program option bytes.
Definition stm32f4xx_hal_flash_ex.c:314
HAL_FLASHEx_Erase
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
Perform a mass erase or erase the specified FLASH memory sectors.
Definition stm32f4xx_hal_flash_ex.c:190
HAL_FLASHEx_OB_GetBank2WRP
uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
Returns the FLASH Write Protection Option Bytes value for Bank 2.
Definition stm32f4xx_hal_flash_ex.c:558
HAL_FLASHEx_AdvOBGetConfig
void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
Get the OBEX byte configuration.
Definition stm32f4xx_hal_flash_ex.c:482
HAL_FLASHEx_OBGetConfig
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
Get the Option byte configuration.
Definition stm32f4xx_hal_flash_ex.c:402
HAL_FLASHEx_OB_SelectPCROP
HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
Select the Protection Mode.
Definition stm32f4xx_hal_flash_ex.c:512
HAL_FLASHEx_OB_DeSelectPCROP
HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
Deselect the Protection Mode.
Definition stm32f4xx_hal_flash_ex.c:537
HAL_FLASHEx_AdvOBProgram
HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
Program option bytes.
Definition stm32f4xx_hal_flash_ex.c:430
HAL_FLASHEx_Erase_IT
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled.
Definition stm32f4xx_hal_flash_ex.c:261
FLASH_Erase_Sector
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
Erase the specified FLASH memory sector.
Definition stm32f4xx_hal_flash_ex.c:637
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
FLASH_AdvOBProgramInitTypeDef
FLASH Advanced Option Bytes Program structure definition.
Definition stm32f4xx_hal_flash_ex.h:119
FLASH_AdvOBProgramInitTypeDef::SectorsBank1
uint16_t SectorsBank1
Definition stm32f4xx_hal_flash_ex.h:135
FLASH_AdvOBProgramInitTypeDef::BootConfig
uint8_t BootConfig
Definition stm32f4xx_hal_flash_ex.h:141
FLASH_AdvOBProgramInitTypeDef::Sectors
uint16_t Sectors
Definition stm32f4xx_hal_flash_ex.h:127
FLASH_AdvOBProgramInitTypeDef::SectorsBank2
uint16_t SectorsBank2
Definition stm32f4xx_hal_flash_ex.h:138
FLASH_AdvOBProgramInitTypeDef::PCROPState
uint32_t PCROPState
Definition stm32f4xx_hal_flash_ex.h:123
FLASH_AdvOBProgramInitTypeDef::OptionType
uint32_t OptionType
Definition stm32f4xx_hal_flash_ex.h:120
FLASH_AdvOBProgramInitTypeDef::Banks
uint32_t Banks
Definition stm32f4xx_hal_flash_ex.h:132
FLASH_OBProgramInitTypeDef
FLASH Option Bytes Program structure definition.
Definition stm32f4xx_hal_flash_ex.h:88
FLASH_OBProgramInitTypeDef::RDPLevel
uint32_t RDPLevel
Definition stm32f4xx_hal_flash_ex.h:101
FLASH_OBProgramInitTypeDef::WRPState
uint32_t WRPState
Definition stm32f4xx_hal_flash_ex.h:92
FLASH_OBProgramInitTypeDef::OptionType
uint32_t OptionType
Definition stm32f4xx_hal_flash_ex.h:89
FLASH_OBProgramInitTypeDef::BORLevel
uint32_t BORLevel
Definition stm32f4xx_hal_flash_ex.h:104
FLASH_OBProgramInitTypeDef::Banks
uint32_t Banks
Definition stm32f4xx_hal_flash_ex.h:98
FLASH_OBProgramInitTypeDef::WRPSector
uint32_t WRPSector
Definition stm32f4xx_hal_flash_ex.h:95
FLASH_OBProgramInitTypeDef::USERConfig
uint8_t USERConfig
Definition stm32f4xx_hal_flash_ex.h:107
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