at32_common.cpp File Reference

Detailed Description

Low level common Artery AT32 code.

Date

Oct 29, 2023

Author

Andrey Gusakov, (c) 2023

Definition in file at32_common.cpp.

Typedefs
typedef struct port_intctx	intctx_t

Functions
int	at32GetMcuType (uint32_t id, const char **pn, const char **package, uint32_t *flashSize)
int	at32GetRamSizeKb (void)
static void	reset_and_jump (void)
void	jump_to_bootloader ()
void	jump_to_openblt ()
BOR_Level_t	BOR_Get (void)
BOR_Result_t	BOR_Set (BOR_Level_t BORValue)
void	startWatchdog (int)
void	tryResetWatchdog ()
void	setWatchdogResetPeriod (int)
void	baseMCUInit (void)
bool	isStm32F42x (void)
EXTERNC int	getRemainingStack (thread_t *otp)
	__attribute__ ((weak)) void boardPrepareForStandby()
Reset_Cause_t	getMCUResetCause ()
const char *	getMCUResetCause (Reset_Cause_t)

Variables
uint32_t	__main_stack_base__

Typedef Documentation

intctx_t

typedef struct port_intctx intctx_t

Definition at line 159 of file at32_common.cpp.

Function Documentation

__attribute__()

__attribute__

(

(weak)

)

Definition at line 185 of file at32_common.cpp.

                                                    {
}

at32GetMcuType()

int at32GetMcuType	(	uint32_t	id,
		const char **	pn,
		const char **	package,
		uint32_t *	flashSize
	)

Definition at line 11 of file at32_common.cpp.

{
    const struct {
        uint32_t uid;
        const char *pn;
        uint32_t flashSize;
        const char *package;
    } at32f43x_types[] = {
        { 0x70084540, "AT32F435ZMT7", 4032, "LQFP144" },
        { 0x70083341, "AT32F435ZGT7", 1024, "LQFP144" },
        { 0x70084598, "AT32F435ZDT7",  448, "LQFP144" },
        { 0x70083242, "AT32F435ZCT7",  256, "LQFP144" },
        { 0x70084543, "AT32F435VMT7", 4032, "LQFP100" },
        { 0x70083344, "AT32F435VGT7", 1024, "LQFP100" },
        { 0x70084599, "AT32F435VDT7",  448, "LQFP100" },
        { 0x70083245, "AT32F435VCT7",  256, "LQFP100" },
        { 0x70084546, "AT32F435RMT7", 4032,  "LQFP64" },
        { 0x70083347, "AT32F435RGT7", 1024,  "LQFP64" },
        { 0x7008459A, "AT32F435RDT7",  448,  "LQFP64" },
        { 0x70083248, "AT32F435RCT7",  256,  "LQFP64" },
        { 0x70084549, "AT32F435CMT7", 4032,  "LQFP48" },
        { 0x7008334A, "AT32F435CGT7", 1024,  "LQFP48" },
        { 0x7008459B, "AT32F435CDT7",  448,  "LQFP48" },
        { 0x7008324B, "AT32F435CCT7",  256,  "LQFP48" },
        { 0x7008454C, "AT32F435CMU7", 4032,   "QFN48" },
        { 0x7008334D, "AT32F435CGU7", 1024,   "QFN48" },
        { 0x7008459C, "AT32F435CDU7",  448,   "QFN48" },
        { 0x7008324E, "AT32F435CCU7",  256,   "QFN48" },
        { 0x7008454F, "AT32F437ZMT7", 4032, "LQFP144" },
        { 0x70083350, "AT32F437ZGT7", 1024, "LQFP144" },
        { 0x7008459D, "AT32F437ZDT7",  448, "LQFP144" },
        { 0x70083251, "AT32F437ZCT7",  256, "LQFP144" },
        { 0x70084552, "AT32F437VMT7", 4032, "LQFP100" },
        { 0x70083353, "AT32F437VGT7", 1024, "LQFP100" },
        { 0x7008459E, "AT32F437VDT7",  448, "LQFP100" },
        { 0x70083254, "AT32F437VCT7",  256, "LQFP100" },
        { 0x70084555, "AT32F437RMT7", 4032,  "LQFP64" },
        { 0x70083356, "AT32F437RGT7", 1024,  "LQFP64" },
        { 0x7008459F, "AT32F437RDT7",  448,  "LQFP64" },
        { 0x70083257, "AT32F437RCT7",  256,  "LQFP64" },
    };
 
    for (size_t i = 0; i < efi::size(at32f43x_types); i++) {
        if (id == at32f43x_types[i].uid) {
            if (pn)
                *pn = at32f43x_types[i].pn;
            if (package)
                *package = at32f43x_types[i].package;
            if (flashSize)
                *flashSize = at32f43x_types[i].flashSize;
            return 0;
        }
    }
 
    /* unknown */
    return -1;
}

Referenced by sayHello().

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at32GetRamSizeKb()

int at32GetRamSizeKb

(

void

)

Definition at line 69 of file at32_common.cpp.

{
    uint8_t EOPB0 = *(__IO uint16_t *) (0x1FFFC010);
    /* TODO: check inverted value */
 
    switch ((*(__IO uint16_t *) (FLASHSIZE_BASE))) {
    case 256:
        EOPB0 &= 0x03;
        if (EOPB0 == 3)
            EOPB0 = 2;
        return 512 - (64 * EOPB0);
    case 448:
        EOPB0 &= 0x07;
        if (EOPB0 > 5)
            EOPB0 = 5;
        return 512 - (64 * EOPB0);
    case 1024:
    case 4032:
        EOPB0 &= 0x07;
        if (EOPB0 > 6)
            EOPB0 = 6;
        return 512 - (64 * EOPB0);
    default:
        return 0;
    }
    return 0;
}

Referenced by sayHello().

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baseMCUInit()

void baseMCUInit

(

void

)

Definition at line 145 of file at32_common.cpp.

                       {
    // looks like this holds a random value on start? Let's set a nice clean zero
    DWT->CYCCNT = 0;
 
    BOR_Set(BOR_Level_1); // one step above default value
}

Referenced by main().

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BOR_Get()

BOR_Level_t BOR_Get

(

void

)

Definition at line 125 of file at32_common.cpp.

                          {
    /* TODO: Artery */
    /* Fake */
    return BOR_Level_None;
}

BOR_Set()

BOR_Result_t BOR_Set

(

BOR_Level_t

BORValue

)

Definition at line 131 of file at32_common.cpp.

                                           {
    /* NOP */
    return BOR_Result_Ok;
}

Referenced by baseMCUInit(), and setBor().

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getMCUResetCause() [1/2]

Reset_Cause_t getMCUResetCause

(

)

Definition at line 188 of file at32_common.cpp.

                                 {
    return Reset_Cause_Unknown;
}

Referenced by checkLastResetCause().

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getMCUResetCause() [2/2]

const char* getMCUResetCause

(

Reset_Cause_t

cause

)

Definition at line 192 of file at32_common.cpp.

                                            {
    return "Unknown";
}

getRemainingStack()

EXTERNC int getRemainingStack

(

thread_t *

otp

)

Of note is that interrupts are NOT serviced on the stack of the thread that was running when the interrupt occurred. The only thing that happens on that thread's stack is that its registers are pushed (by hardware) when an interrupt occurs, just before swapping the stack pointer out for the main stack (currently 0x400=1024 bytes), where the ISR actually runs. see also main_stack_size see also process_stack_size

see also http://www.chibios.org/dokuwiki/doku.php?id=chibios:kb:stacks

In the firmware we are using 'extern *Engine' - in the firmware Engine is a singleton

On the other hand, in order to have a meaningful unit test we are passing Engine * engine as a parameter

Definition at line 163 of file at32_common.cpp.

                                             {
#if CH_DBG_ENABLE_STACK_CHECK
    // this would dismiss coverity warning - see http://rusefi.com/forum/viewtopic.php?f=5&t=655
    // coverity[uninit_use]
    register intctx_t *r13 asm ("r13");
    otp->activeStack = r13;
 
    int remainingStack;
    if (ch.dbg.isr_cnt > 0) {
        // ISR context
        remainingStack = (int)(r13 - 1) - (int)&__main_stack_base__;
    } else {
        remainingStack = (int)(r13 - 1) - (int)otp->wabase;
    }
    otp->remainingStack = remainingStack;
    return remainingStack;
#else
    UNUSED(otp);
    return 99999;
#endif /* CH_DBG_ENABLE_STACK_CHECK */
}

isStm32F42x()

bool isStm32F42x

(

void

)

Definition at line 155 of file at32_common.cpp.

                       {
    return false;
}

Referenced by sayHello(), and startLua().

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jump_to_bootloader()

void jump_to_bootloader

(

)

Definition at line 105 of file at32_common.cpp.

                          {
    // leave DFU breadcrumb which assembly startup code would check, see [rusefi][DFU] section in assembly code
 
    *((unsigned long *)0x2001FFF0) = 0xDEADBEEF; // End of RAM
 
    reset_and_jump();
}

Referenced by executeTSCommand(), and runRusEfi().

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jump_to_openblt()

void jump_to_openblt

(

)

Definition at line 114 of file at32_common.cpp.

                       {
#if EFI_USE_OPENBLT
    /* safe to call on already inited shares area */
    SharedParamsInit();
    /* Store sing to stay in OpenBLT */
    SharedParamsWriteByIndex(0, 0x01);
 
    reset_and_jump();
#endif
}

Referenced by executeTSCommand(), processCanRxMessage(), and runRusEfi().

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reset_and_jump()

static void reset_and_jump ( void  )

static

Definition at line 99 of file at32_common.cpp.

                                 {
    // and now reboot
    NVIC_SystemReset();
}

Referenced by jump_to_bootloader(), and jump_to_openblt().

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setWatchdogResetPeriod()

void setWatchdogResetPeriod

(

int

resetMs

)

Definition at line 142 of file at32_common.cpp.

                                 {
}

Referenced by initializeConsole().

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startWatchdog()

void startWatchdog

(

int

timeoutMs

)

Definition at line 136 of file at32_common.cpp.

                        {
}

Referenced by initializeConsole(), and writeToFlashNow().

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tryResetWatchdog()

void tryResetWatchdog

(

)

Definition at line 139 of file at32_common.cpp.

                        {
}

Referenced by doPeriodicSlowCallback().

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Variable Documentation

__main_stack_base__

uint32_t __main_stack_base__

extern

Referenced by getRemainingStack().

Go to the source code of this file.