248 {
249 .spi_bus = &SPID5,
250 .spi_config = {
251 .circular = false,
252#ifdef _CHIBIOS_RT_CONF_VER_6_1_
253 .end_cb = nullptr,
254#else
255 .slave = false,
256 .data_cb = nullptr,
257 .error_cb = nullptr,
258#endif
259 .ssport = GPIOF,
260 .sspad = 1,
261 .cr1 =
262
263 SPI_CR1_SSM |
264 SPI_CR1_SSI |
265 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
266 SPI_CR1_MSTR |
267
268
269
270
271
272 0,
273 .cr2 =
274 SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
275 },
276 .direct_io = {
277
278 [0] = {.port = GPIOI, .pad = 6},
279 [1] = {.port = GPIOI, .pad = 5},
280 [2] = {.port = GPIOI, .pad = 4},
281 [3] = {.port = GPIOB, .pad = 9},
282
283 [4] = {.port = GPIOB, .pad = 3},
284 [5] = {.port = GPIOB, .pad = 4},
285 [6] = {.port = GPIOB, .pad = 5},
286 [7] = {.port = GPIOB, .pad = 8},
287 },
288
289 .en = {.port = GPIOI, .pad = 7},
290
291 .sck = {.port = GPIOF, .pad = 7},
292
296};