75#ifdef _CHIBIOS_RT_CONF_VER_6_1_
89 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
93 .cr2 = SPI_CR2_16BIT_MODE
96 { .port = GPIOD, .pad = 3 },
97 { .port = GPIOD, .pad = 11 },
98 { .port = GPIOA, .pad = 9 },
99 { .port = GPIOD, .pad = 10 }
108#ifdef _CHIBIOS_RT_CONF_VER_6_1_
122 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
126 .cr2 = SPI_CR2_16BIT_MODE
129 { .port = GPIOA, .pad = 8 },
130 { .port = GPIOD, .pad = 15 },
131 { .port = GPIOD, .pad = 2 },
132 { .port = NULL, .pad = 0 }
141#ifdef _CHIBIOS_RT_CONF_VER_6_1_
155 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
159 .cr2 = SPI_CR2_16BIT_MODE
162 { .port = GPIOD, .pad = 12 },
163 { .port = GPIOD, .pad = 14 },
164 { .port = NULL, .pad = 0 },
165 { .port = GPIOA, .pad = 10 }